^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2020 InvenSense, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Driver for InvenSense ICP-1010xx barometric pressure and temperature sensor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Datasheet:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * http://www.invensense.com/wp-content/uploads/2018/01/DS-000186-ICP-101xx-v1.2.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/crc8.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/log2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/math64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ICP10100_ID_REG_GET(_reg) ((_reg) & 0x003F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ICP10100_ID_REG 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ICP10100_RESPONSE_WORD_LENGTH 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ICP10100_CRC8_WORD_LENGTH 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ICP10100_CRC8_POLYNOMIAL 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ICP10100_CRC8_INIT 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum icp10100_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ICP10100_MODE_LP, /* Low power mode: 1x sampling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ICP10100_MODE_N, /* Normal mode: 2x sampling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ICP10100_MODE_LN, /* Low noise mode: 4x sampling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ICP10100_MODE_ULN, /* Ultra low noise mode: 8x sampling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ICP10100_MODE_NB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct icp10100_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct regulator *vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) enum icp10100_mode mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int16_t cal[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct icp10100_command {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) __be16 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned long wait_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned long wait_max_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) size_t response_word_nb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static const struct icp10100_command icp10100_cmd_soft_reset = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .cmd = cpu_to_be16(0x805D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .wait_us = 170,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .wait_max_us = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .response_word_nb = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static const struct icp10100_command icp10100_cmd_read_id = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .cmd = cpu_to_be16(0xEFC8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .wait_us = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .response_word_nb = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const struct icp10100_command icp10100_cmd_read_otp = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .cmd = cpu_to_be16(0xC7F7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .wait_us = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .response_word_nb = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static const struct icp10100_command icp10100_cmd_measure[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) [ICP10100_MODE_LP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .cmd = cpu_to_be16(0x401A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .wait_us = 1800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .wait_max_us = 2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .response_word_nb = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) [ICP10100_MODE_N] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .cmd = cpu_to_be16(0x48A3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .wait_us = 6300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .wait_max_us = 6500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .response_word_nb = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) [ICP10100_MODE_LN] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .cmd = cpu_to_be16(0x5059),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .wait_us = 23800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .wait_max_us = 24000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .response_word_nb = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) [ICP10100_MODE_ULN] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .cmd = cpu_to_be16(0x58E0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .wait_us = 94500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .wait_max_us = 94700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .response_word_nb = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static const uint8_t icp10100_switch_mode_otp[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {0xC5, 0x95, 0x00, 0x66, 0x9c};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) DECLARE_CRC8_TABLE(icp10100_crc8_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static inline int icp10100_i2c_xfer(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct i2c_msg *msgs, int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = i2c_transfer(adap, msgs, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (ret != num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int icp10100_send_cmd(struct icp10100_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) const struct icp10100_command *cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) __be16 *buf, size_t buf_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) size_t size = cmd->response_word_nb * ICP10100_RESPONSE_WORD_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) uint8_t data[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) uint8_t *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) uint8_t *buf_ptr = (uint8_t *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct i2c_msg msgs[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .addr = st->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .buf = (uint8_t *)&cmd->cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .addr = st->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .len = size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .buf = data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) uint8_t crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (size > sizeof(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (cmd->response_word_nb > 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) (buf == NULL || buf_len < (cmd->response_word_nb * 2)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) dev_dbg(&st->client->dev, "sending cmd %#x\n", be16_to_cpu(cmd->cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (cmd->response_word_nb > 0 && cmd->wait_us == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* direct command-response without waiting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ret = icp10100_i2c_xfer(st->client->adapter, msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* transfer command write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ret = icp10100_i2c_xfer(st->client->adapter, &msgs[0], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (cmd->wait_us > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) usleep_range(cmd->wait_us, cmd->wait_max_us);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* transfer response read if needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (cmd->response_word_nb > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = icp10100_i2c_xfer(st->client->adapter, &msgs[1], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* process read words with crc checking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) for (i = 0; i < cmd->response_word_nb; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ptr = &data[i * ICP10100_RESPONSE_WORD_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) crc = crc8(icp10100_crc8_table, ptr, ICP10100_CRC8_WORD_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ICP10100_CRC8_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (crc != ptr[ICP10100_CRC8_WORD_LENGTH]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) dev_err(&st->client->dev, "crc error recv=%#x calc=%#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ptr[ICP10100_CRC8_WORD_LENGTH], crc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) *buf_ptr++ = ptr[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) *buf_ptr++ = ptr[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int icp10100_read_cal_otp(struct icp10100_state *st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) __be16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /* switch into OTP read mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ret = i2c_master_send(st->client, icp10100_switch_mode_otp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ARRAY_SIZE(icp10100_switch_mode_otp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (ret != ARRAY_SIZE(icp10100_switch_mode_otp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* read 4 calibration values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) for (i = 0; i < 4; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ret = icp10100_send_cmd(st, &icp10100_cmd_read_otp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) &val, sizeof(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) st->cal[i] = be16_to_cpu(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_dbg(&st->client->dev, "cal[%d] = %d\n", i, st->cal[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int icp10100_init_chip(struct icp10100_state *st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) __be16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) uint16_t id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* read and check id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = icp10100_send_cmd(st, &icp10100_cmd_read_id, &val, sizeof(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) id = ICP10100_ID_REG_GET(be16_to_cpu(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (id != ICP10100_ID_REG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) dev_err(&st->client->dev, "invalid id %#x\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* read calibration data from OTP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ret = icp10100_read_cal_otp(st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* reset chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return icp10100_send_cmd(st, &icp10100_cmd_soft_reset, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int icp10100_get_measures(struct icp10100_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) uint32_t *pressure, uint16_t *temperature)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) const struct icp10100_command *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) __be16 measures[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) pm_runtime_get_sync(&st->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) cmd = &icp10100_cmd_measure[st->mode];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = icp10100_send_cmd(st, cmd, measures, sizeof(measures));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) goto error_measure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) *pressure = (be16_to_cpu(measures[0]) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) (be16_to_cpu(measures[1]) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) *temperature = be16_to_cpu(measures[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) pm_runtime_mark_last_busy(&st->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) error_measure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) pm_runtime_put_autosuspend(&st->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static uint32_t icp10100_get_pressure(struct icp10100_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) uint32_t raw_pressure, uint16_t raw_temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int32_t p_calib[] = {45000, 80000, 105000};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static int32_t lut_lower = 3670016;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static int32_t lut_upper = 12058624;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static int32_t inv_quadr_factor = 16777216;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static int32_t offset_factor = 2048;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int64_t val1, val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int32_t p_lut[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int32_t t, t_square;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int64_t a, b, c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) uint32_t pressure_mPa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) dev_dbg(&st->client->dev, "raw: pressure = %u, temp = %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) raw_pressure, raw_temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* compute p_lut values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) t = (int32_t)raw_temp - 32768;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) t_square = t * t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) val1 = (int64_t)st->cal[0] * (int64_t)t_square;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) p_lut[0] = lut_lower + (int32_t)div_s64(val1, inv_quadr_factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) val1 = (int64_t)st->cal[1] * (int64_t)t_square;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) p_lut[1] = offset_factor * st->cal[3] +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) (int32_t)div_s64(val1, inv_quadr_factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) val1 = (int64_t)st->cal[2] * (int64_t)t_square;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) p_lut[2] = lut_upper + (int32_t)div_s64(val1, inv_quadr_factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) dev_dbg(&st->client->dev, "p_lut = [%d, %d, %d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) p_lut[0], p_lut[1], p_lut[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* compute a, b, c factors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) val1 = (int64_t)p_lut[0] * (int64_t)p_lut[1] *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) (int64_t)(p_calib[0] - p_calib[1]) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) (int64_t)p_lut[1] * (int64_t)p_lut[2] *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) (int64_t)(p_calib[1] - p_calib[2]) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) (int64_t)p_lut[2] * (int64_t)p_lut[0] *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) (int64_t)(p_calib[2] - p_calib[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) val2 = (int64_t)p_lut[2] * (int64_t)(p_calib[0] - p_calib[1]) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) (int64_t)p_lut[0] * (int64_t)(p_calib[1] - p_calib[2]) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) (int64_t)p_lut[1] * (int64_t)(p_calib[2] - p_calib[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) c = div64_s64(val1, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dev_dbg(&st->client->dev, "val1 = %lld, val2 = %lld, c = %lld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) val1, val2, c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) val1 = (int64_t)p_calib[0] * (int64_t)p_lut[0] -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) (int64_t)p_calib[1] * (int64_t)p_lut[1] -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) (int64_t)(p_calib[1] - p_calib[0]) * c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) val2 = (int64_t)p_lut[0] - (int64_t)p_lut[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) a = div64_s64(val1, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) dev_dbg(&st->client->dev, "val1 = %lld, val2 = %lld, a = %lld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) val1, val2, a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) b = ((int64_t)p_calib[0] - a) * ((int64_t)p_lut[0] + c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) dev_dbg(&st->client->dev, "b = %lld\n", b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * pressure_Pa = a + (b / (c + raw_pressure))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * pressure_mPa = 1000 * pressure_Pa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) pressure_mPa = 1000LL * a + div64_s64(1000LL * b, c + raw_pressure);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return pressure_mPa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int icp10100_read_raw_measures(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) int *val, int *val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct icp10100_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) uint32_t raw_pressure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) uint16_t raw_temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) uint32_t pressure_mPa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) ret = iio_device_claim_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) ret = icp10100_get_measures(st, &raw_pressure, &raw_temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) goto error_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) case IIO_PRESSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) pressure_mPa = icp10100_get_pressure(st, raw_pressure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) raw_temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* mPa to kPa */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) *val = pressure_mPa / 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) *val2 = pressure_mPa % 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ret = IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) *val = raw_temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) error_release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) iio_device_release_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static int icp10100_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) struct icp10100_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) case IIO_CHAN_INFO_PROCESSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return icp10100_read_raw_measures(indio_dev, chan, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /* 1000 * 175°C / 65536 in m°C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) *val = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) *val2 = 670288;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) case IIO_CHAN_INFO_OFFSET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /* 1000 * -45°C in m°C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) *val = -45000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) *val = 1 << st->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static int icp10100_read_avail(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) const int **vals, int *type, int *length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static int oversamplings[] = {1, 2, 4, 8};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) *vals = oversamplings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) *type = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) *length = ARRAY_SIZE(oversamplings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return IIO_AVAIL_LIST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static int icp10100_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) struct icp10100_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /* oversampling is always positive and a power of 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) if (val <= 0 || !is_power_of_2(val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) mode = ilog2(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (mode >= ICP10100_MODE_NB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ret = iio_device_claim_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) st->mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) iio_device_release_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static int icp10100_write_raw_get_fmt(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static const struct iio_info icp10100_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .read_raw = icp10100_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .read_avail = icp10100_read_avail,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .write_raw = icp10100_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .write_raw_get_fmt = icp10100_write_raw_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static const struct iio_chan_spec icp10100_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .type = IIO_PRESSURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .info_mask_shared_by_all =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .info_mask_shared_by_all_available =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .info_mask_shared_by_all =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .info_mask_shared_by_all_available =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static int icp10100_enable_regulator(struct icp10100_state *st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ret = regulator_enable(st->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static void icp10100_disable_regulator_action(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) struct icp10100_state *st = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ret = regulator_disable(st->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) dev_err(&st->client->dev, "error %d disabling vdd\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static void icp10100_pm_disable(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) struct device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) pm_runtime_put_sync_suspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static int icp10100_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) struct icp10100_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) dev_err(&client->dev, "plain i2c transactions not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) indio_dev->name = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) indio_dev->channels = icp10100_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) indio_dev->num_channels = ARRAY_SIZE(icp10100_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) indio_dev->info = &icp10100_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) mutex_init(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) st->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) st->mode = ICP10100_MODE_N;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) st->vdd = devm_regulator_get(&client->dev, "vdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (IS_ERR(st->vdd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return PTR_ERR(st->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) ret = icp10100_enable_regulator(st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ret = devm_add_action_or_reset(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) icp10100_disable_regulator_action, st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* has to be done before the first i2c communication */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) crc8_populate_msb(icp10100_crc8_table, ICP10100_CRC8_POLYNOMIAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) ret = icp10100_init_chip(st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) dev_err(&client->dev, "init chip error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) /* enable runtime pm with autosuspend delay of 2s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) pm_runtime_get_noresume(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) pm_runtime_set_active(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) pm_runtime_enable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) pm_runtime_set_autosuspend_delay(&client->dev, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) pm_runtime_use_autosuspend(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) pm_runtime_put(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ret = devm_add_action_or_reset(&client->dev, icp10100_pm_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) &client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) static int __maybe_unused icp10100_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) struct icp10100_state *st = iio_priv(dev_get_drvdata(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) ret = regulator_disable(st->vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) static int __maybe_unused icp10100_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) struct icp10100_state *st = iio_priv(dev_get_drvdata(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) ret = icp10100_enable_regulator(st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* reset chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) ret = icp10100_send_cmd(st, &icp10100_cmd_soft_reset, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static UNIVERSAL_DEV_PM_OPS(icp10100_pm, icp10100_suspend, icp10100_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static const struct of_device_id icp10100_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) .compatible = "invensense,icp10100",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) MODULE_DEVICE_TABLE(of, icp10100_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static const struct i2c_device_id icp10100_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) { "icp10100", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) MODULE_DEVICE_TABLE(i2c, icp10100_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static struct i2c_driver icp10100_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .name = "icp10100",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .pm = &icp10100_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .of_match_table = icp10100_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .probe = icp10100_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) .id_table = icp10100_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) module_i2c_driver(icp10100_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) MODULE_AUTHOR("InvenSense, Inc.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) MODULE_DESCRIPTION("InvenSense icp10100 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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