Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * hp206c.c - HOPERF HP206C precision barometer and altimeter sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2016, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * (7-bit I2C slave address 0x76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Datasheet:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *  http://www.hoperf.com/upload/sensor/HP206C_DataSheet_EN_V2.0.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/util_macros.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) /* I2C commands: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define HP206C_CMD_SOFT_RST	0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define HP206C_CMD_ADC_CVT	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define HP206C_CMD_ADC_CVT_OSR_4096	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define HP206C_CMD_ADC_CVT_OSR_2048	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define HP206C_CMD_ADC_CVT_OSR_1024	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define HP206C_CMD_ADC_CVT_OSR_512	0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define HP206C_CMD_ADC_CVT_OSR_256	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define HP206C_CMD_ADC_CVT_OSR_128	0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define HP206C_CMD_ADC_CVT_CHNL_PT	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define HP206C_CMD_ADC_CVT_CHNL_T	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define HP206C_CMD_READ_P	0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define HP206C_CMD_READ_T	0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define HP206C_CMD_READ_REG	0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define HP206C_CMD_WRITE_REG	0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define HP206C_REG_INT_EN	0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define HP206C_REG_INT_CFG	0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define HP206C_REG_INT_SRC	0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define HP206C_FLAG_DEV_RDY	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define HP206C_REG_PARA		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define HP206C_FLAG_CMPS_EN	0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) /* Maximum spin for DEV_RDY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define HP206C_MAX_DEV_RDY_WAIT_COUNT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define HP206C_DEV_RDY_WAIT_US    20000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) struct hp206c_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	int temp_osr_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	int pres_osr_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct hp206c_osr_setting {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u8 osr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	unsigned int temp_conv_time_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	unsigned int pres_conv_time_us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) /* Data from Table 5 in datasheet. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static const struct hp206c_osr_setting hp206c_osr_settings[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	{ HP206C_CMD_ADC_CVT_OSR_4096,	65600,	131100	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	{ HP206C_CMD_ADC_CVT_OSR_2048,	32800,	65600	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	{ HP206C_CMD_ADC_CVT_OSR_1024,	16400,	32800	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	{ HP206C_CMD_ADC_CVT_OSR_512,	8200,	16400	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	{ HP206C_CMD_ADC_CVT_OSR_256,	4100,	8200	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	{ HP206C_CMD_ADC_CVT_OSR_128,	2100,	4100	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static const int hp206c_osr_rates[] = { 4096, 2048, 1024, 512, 256, 128 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static const char hp206c_osr_rates_str[] = "4096 2048 1024 512 256 128";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static inline int hp206c_read_reg(struct i2c_client *client, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return i2c_smbus_read_byte_data(client, HP206C_CMD_READ_REG | reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static inline int hp206c_write_reg(struct i2c_client *client, u8 reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	return i2c_smbus_write_byte_data(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			HP206C_CMD_WRITE_REG | reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static int hp206c_read_20bit(struct i2c_client *client, u8 cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	u8 values[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	ret = i2c_smbus_read_i2c_block_data(client, cmd, sizeof(values), values);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (ret != sizeof(values))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	return get_unaligned_be24(&values[0]) & GENMASK(19, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Spin for max 160ms until DEV_RDY is 1, or return error. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int hp206c_wait_dev_rdy(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct hp206c_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	while (++count <= HP206C_MAX_DEV_RDY_WAIT_COUNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		ret = hp206c_read_reg(client, HP206C_REG_INT_SRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			dev_err(&indio_dev->dev, "Failed READ_REG INT_SRC: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		if (ret & HP206C_FLAG_DEV_RDY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		usleep_range(HP206C_DEV_RDY_WAIT_US, HP206C_DEV_RDY_WAIT_US * 3 / 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int hp206c_set_compensation(struct i2c_client *client, bool enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	val = hp206c_read_reg(client, HP206C_REG_PARA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		val |= HP206C_FLAG_CMPS_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		val &= ~HP206C_FLAG_CMPS_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	return hp206c_write_reg(client, HP206C_REG_PARA, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* Do a soft reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int hp206c_soft_reset(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	struct hp206c_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	ret = i2c_smbus_write_byte(client, HP206C_CMD_SOFT_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		dev_err(&client->dev, "Failed to reset device: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	usleep_range(400, 600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	ret = hp206c_wait_dev_rdy(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		dev_err(&client->dev, "Device not ready after soft reset: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	ret = hp206c_set_compensation(client, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		dev_err(&client->dev, "Failed to enable compensation: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static int hp206c_conv_and_read(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 				u8 conv_cmd, u8 read_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 				unsigned int sleep_us)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct hp206c_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	ret = hp206c_wait_dev_rdy(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		dev_err(&indio_dev->dev, "Device not ready: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	ret = i2c_smbus_write_byte(client, conv_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		dev_err(&indio_dev->dev, "Failed convert: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	usleep_range(sleep_us, sleep_us * 3 / 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	ret = hp206c_wait_dev_rdy(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		dev_err(&indio_dev->dev, "Device not ready: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	ret = hp206c_read_20bit(client, read_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		dev_err(&indio_dev->dev, "Failed read: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static int hp206c_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			   struct iio_chan_spec const *chan, int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			   int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct hp206c_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	const struct hp206c_osr_setting *osr_setting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	u8 conv_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	mutex_lock(&data->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			*val = hp206c_osr_rates[data->temp_osr_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 			ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		case IIO_PRESSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			*val = hp206c_osr_rates[data->pres_osr_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			osr_setting = &hp206c_osr_settings[data->temp_osr_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			conv_cmd = HP206C_CMD_ADC_CVT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 					osr_setting->osr_mask |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 					HP206C_CMD_ADC_CVT_CHNL_T;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			ret = hp206c_conv_and_read(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 					conv_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 					HP206C_CMD_READ_T,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 					osr_setting->temp_conv_time_us);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				/* 20 significant bits are provided.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 				 * Extend sign over the rest.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				*val = sign_extend32(ret, 19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 				ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		case IIO_PRESSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			osr_setting = &hp206c_osr_settings[data->pres_osr_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			conv_cmd = HP206C_CMD_ADC_CVT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 					osr_setting->osr_mask |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 					HP206C_CMD_ADC_CVT_CHNL_PT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			ret = hp206c_conv_and_read(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 					conv_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 					HP206C_CMD_READ_P,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 					osr_setting->pres_conv_time_us);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 				*val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 				ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 			*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			*val2 = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 			ret = IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		case IIO_PRESSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 			*val2 = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 			ret = IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	mutex_unlock(&data->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static int hp206c_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			    int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	struct hp206c_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	if (mask != IIO_CHAN_INFO_OVERSAMPLING_RATIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	mutex_lock(&data->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		data->temp_osr_index = find_closest_descending(val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 			hp206c_osr_rates, ARRAY_SIZE(hp206c_osr_rates));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	case IIO_PRESSURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		data->pres_osr_index = find_closest_descending(val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 			hp206c_osr_rates, ARRAY_SIZE(hp206c_osr_rates));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	mutex_unlock(&data->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static const struct iio_chan_spec hp206c_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		.type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 				      BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 				      BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		.type = IIO_PRESSURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 				      BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 				      BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(hp206c_osr_rates_str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static struct attribute *hp206c_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static const struct attribute_group hp206c_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	.attrs = hp206c_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static const struct iio_info hp206c_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	.attrs = &hp206c_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	.read_raw = hp206c_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	.write_raw = hp206c_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int hp206c_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	struct hp206c_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 				     I2C_FUNC_SMBUS_BYTE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 				     I2C_FUNC_SMBUS_BYTE_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 				     I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		dev_err(&client->dev, "Adapter does not support "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 				"all required i2c functionality\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	mutex_init(&data->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	indio_dev->info = &hp206c_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	indio_dev->name = id->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	indio_dev->channels = hp206c_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	indio_dev->num_channels = ARRAY_SIZE(hp206c_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	/* Do a soft reset on probe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	ret = hp206c_soft_reset(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		dev_err(&client->dev, "Failed to reset on startup: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	return devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static const struct i2c_device_id hp206c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	{"hp206c"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) MODULE_DEVICE_TABLE(i2c, hp206c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static const struct acpi_device_id hp206c_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	{"HOP206C", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) MODULE_DEVICE_TABLE(acpi, hp206c_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static struct i2c_driver hp206c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	.probe = hp206c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	.id_table = hp206c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		.name = "hp206c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 		.acpi_match_table = ACPI_PTR(hp206c_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) module_i2c_driver(hp206c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) MODULE_DESCRIPTION("HOPERF HP206C precision barometer and altimeter sensor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) MODULE_AUTHOR("Leonard Crestez <leonard.crestez@intel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) MODULE_LICENSE("GPL v2");