^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SPI interface for the BMP280 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Inspired by the older BMP085 driver drivers/misc/bmp085-spi.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "bmp280.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static int bmp280_regmap_spi_write(void *context, const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) memcpy(buf, data, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * The SPI register address (= full register address without bit 7) and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * the write command (bit7 = RW = '0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) buf[0] &= ~0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) return spi_write_then_read(spi, buf, 2, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int bmp280_regmap_spi_read(void *context, const void *reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) size_t reg_size, void *val, size_t val_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return spi_write_then_read(spi, reg, reg_size, val, val_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct regmap_bus bmp280_regmap_bus = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .write = bmp280_regmap_spi_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .read = bmp280_regmap_spi_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .reg_format_endian_default = REGMAP_ENDIAN_BIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .val_format_endian_default = REGMAP_ENDIAN_BIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int bmp280_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) const struct spi_device_id *id = spi_get_device_id(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) const struct regmap_config *regmap_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) spi->bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ret = spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dev_err(&spi->dev, "spi_setup failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) switch (id->driver_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) case BMP180_CHIP_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) regmap_config = &bmp180_regmap_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) case BMP280_CHIP_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) case BME280_CHIP_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) regmap_config = &bmp280_regmap_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) regmap = devm_regmap_init(&spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) &bmp280_regmap_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) &spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dev_err(&spi->dev, "failed to allocate register map\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return bmp280_common_probe(&spi->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) id->driver_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) id->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) spi->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static const struct of_device_id bmp280_of_spi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { .compatible = "bosch,bmp085", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) { .compatible = "bosch,bmp180", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { .compatible = "bosch,bmp181", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { .compatible = "bosch,bmp280", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { .compatible = "bosch,bme280", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MODULE_DEVICE_TABLE(of, bmp280_of_spi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static const struct spi_device_id bmp280_spi_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) { "bmp180", BMP180_CHIP_ID },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) { "bmp181", BMP180_CHIP_ID },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) { "bmp280", BMP280_CHIP_ID },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { "bme280", BME280_CHIP_ID },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MODULE_DEVICE_TABLE(spi, bmp280_spi_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static struct spi_driver bmp280_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .name = "bmp280",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .of_match_table = bmp280_of_spi_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .pm = &bmp280_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .id_table = bmp280_spi_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .probe = bmp280_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) module_spi_driver(bmp280_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MODULE_DESCRIPTION("BMP280 SPI bus driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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