Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * tpl0102.c - Support for Texas Instruments digital potentiometers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2016, 2018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Matt Ranostay <matt.ranostay@konsulko.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * TODO: enable/disable hi-z output control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) struct tpl0102_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	int wipers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	int avail[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	int kohms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) enum tpl0102_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	CAT5140_503,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	CAT5140_104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	TPL0102_104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	TPL0401_103,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static const struct tpl0102_cfg tpl0102_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	/* on-semiconductor parts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	[CAT5140_503] = { .wipers = 1, .avail = { 0, 1, 255 }, .kohms = 50, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	[CAT5140_104] = { .wipers = 1, .avail = { 0, 1, 255 }, .kohms = 100, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	/* ti parts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	[TPL0102_104] = { .wipers = 2, .avail = { 0, 1, 255 }, .kohms = 100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	[TPL0401_103] = { .wipers = 1, .avail = { 0, 1, 127 }, .kohms = 10, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) struct tpl0102_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	const struct tpl0102_cfg *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static const struct regmap_config tpl0102_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define TPL0102_CHANNEL(ch) {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	.type = IIO_RESISTANCE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.indexed = 1,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.output = 1,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	.channel = (ch),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	.info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static const struct iio_chan_spec tpl0102_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	TPL0102_CHANNEL(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	TPL0102_CHANNEL(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static int tpl0102_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			    int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct tpl0102_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	case IIO_CHAN_INFO_RAW: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		int ret = regmap_read(data->regmap, chan->channel, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		return ret ? ret : IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		*val = 1000 * data->cfg->kohms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		*val2 = data->cfg->avail[2] + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static int tpl0102_read_avail(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			      struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			      const int **vals, int *type, int *length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 			      long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct tpl0102_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		*length = ARRAY_SIZE(data->cfg->avail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		*vals = data->cfg->avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		*type = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return IIO_AVAIL_RANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int tpl0102_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			     struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			     int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct tpl0102_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (mask != IIO_CHAN_INFO_RAW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (val > data->cfg->avail[2] || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return regmap_write(data->regmap, chan->channel, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static const struct iio_info tpl0102_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	.read_raw = tpl0102_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	.read_avail = tpl0102_read_avail,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	.write_raw = tpl0102_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int tpl0102_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct tpl0102_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	data->cfg = &tpl0102_cfg[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	data->regmap = devm_regmap_init_i2c(client, &tpl0102_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (IS_ERR(data->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		dev_err(dev, "regmap initialization failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		return PTR_ERR(data->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	indio_dev->info = &tpl0102_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	indio_dev->channels = tpl0102_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	indio_dev->num_channels = data->cfg->wipers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	indio_dev->name = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	return devm_iio_device_register(dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static const struct i2c_device_id tpl0102_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	{ "cat5140-503", CAT5140_503 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	{ "cat5140-104", CAT5140_104 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	{ "tpl0102-104", TPL0102_104 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	{ "tpl0401-103", TPL0401_103 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_DEVICE_TABLE(i2c, tpl0102_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static struct i2c_driver tpl0102_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		.name = "tpl0102",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.probe = tpl0102_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.id_table = tpl0102_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) module_i2c_driver(tpl0102_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) MODULE_DESCRIPTION("TPL0102 digital potentiometer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MODULE_LICENSE("GPL");