^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Industrial I/O driver for Microchip digital potentiometers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2018 Axentia Technologies AB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Peter Rosin <peda@axentia.se>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Datasheet: http://www.microchip.com/downloads/en/DeviceDoc/22147a.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * DEVID #Wipers #Positions Resistor Opts (kOhm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * mcp4017 1 128 5, 10, 50, 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * mcp4018 1 128 5, 10, 50, 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * mcp4019 1 128 5, 10, 50, 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MCP4018_WIPER_MAX 127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct mcp4018_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int kohms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) enum mcp4018_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MCP4018_502,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MCP4018_103,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MCP4018_503,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MCP4018_104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static const struct mcp4018_cfg mcp4018_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) [MCP4018_502] = { .kohms = 5, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) [MCP4018_103] = { .kohms = 10, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) [MCP4018_503] = { .kohms = 50, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) [MCP4018_104] = { .kohms = 100, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct mcp4018_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) const struct mcp4018_cfg *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static const struct iio_chan_spec mcp4018_channel = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .type = IIO_RESISTANCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .indexed = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .output = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static int mcp4018_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct mcp4018_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) s32 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ret = i2c_smbus_read_byte(data->client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) *val = 1000 * data->cfg->kohms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *val2 = MCP4018_WIPER_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int mcp4018_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct mcp4018_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (val > MCP4018_WIPER_MAX || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return i2c_smbus_write_byte(data->client, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const struct iio_info mcp4018_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .read_raw = mcp4018_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .write_raw = mcp4018_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct i2c_device_id mcp4018_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { "mcp4017-502", MCP4018_502 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { "mcp4017-103", MCP4018_103 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { "mcp4017-503", MCP4018_503 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { "mcp4017-104", MCP4018_104 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { "mcp4018-502", MCP4018_502 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) { "mcp4018-103", MCP4018_103 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) { "mcp4018-503", MCP4018_503 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { "mcp4018-104", MCP4018_104 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { "mcp4019-502", MCP4018_502 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { "mcp4019-103", MCP4018_103 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { "mcp4019-503", MCP4018_503 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { "mcp4019-104", MCP4018_104 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MODULE_DEVICE_TABLE(i2c, mcp4018_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define MCP4018_COMPATIBLE(of_compatible, cfg) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .compatible = of_compatible, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .data = &mcp4018_cfg[cfg], \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const struct of_device_id mcp4018_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MCP4018_COMPATIBLE("microchip,mcp4017-502", MCP4018_502),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MCP4018_COMPATIBLE("microchip,mcp4017-103", MCP4018_103),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MCP4018_COMPATIBLE("microchip,mcp4017-503", MCP4018_503),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MCP4018_COMPATIBLE("microchip,mcp4017-104", MCP4018_104),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MCP4018_COMPATIBLE("microchip,mcp4018-502", MCP4018_502),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) MCP4018_COMPATIBLE("microchip,mcp4018-103", MCP4018_103),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MCP4018_COMPATIBLE("microchip,mcp4018-503", MCP4018_503),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MCP4018_COMPATIBLE("microchip,mcp4018-104", MCP4018_104),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MCP4018_COMPATIBLE("microchip,mcp4019-502", MCP4018_502),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MCP4018_COMPATIBLE("microchip,mcp4019-103", MCP4018_103),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) MCP4018_COMPATIBLE("microchip,mcp4019-503", MCP4018_503),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MCP4018_COMPATIBLE("microchip,mcp4019-104", MCP4018_104),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_DEVICE_TABLE(of, mcp4018_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int mcp4018_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct mcp4018_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (!i2c_check_functionality(client->adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) I2C_FUNC_SMBUS_BYTE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) dev_err(dev, "SMBUS Byte transfers not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) data->cfg = device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (!data->cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) data->cfg = &mcp4018_cfg[i2c_match_id(mcp4018_id, client)->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) indio_dev->info = &mcp4018_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) indio_dev->channels = &mcp4018_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) indio_dev->num_channels = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) indio_dev->name = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return devm_iio_device_register(dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static struct i2c_driver mcp4018_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .name = "mcp4018",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .of_match_table = mcp4018_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .probe_new = mcp4018_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .id_table = mcp4018_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) module_i2c_driver(mcp4018_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MODULE_AUTHOR("Peter Rosin <peda@axentia.se>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MODULE_DESCRIPTION("MCP4018 digital potentiometer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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