Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Analog Devices AD5272 digital potentiometer driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2018 Phil Reid <preid@electromag.com.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/AD5272_5274.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * DEVID	#Wipers	#Positions	Resistor Opts (kOhm)	i2c address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * ad5272	1	1024		20, 50, 100		01011xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * ad5274	1	256		20, 100			01011xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define  AD5272_RDAC_WR  1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define  AD5272_RDAC_RD  2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define  AD5272_RESET    4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define  AD5272_CTL      7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define  AD5272_RDAC_WR_EN  BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) struct ad5272_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	int max_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	int kohms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	int shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) enum ad5272_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	AD5272_020,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	AD5272_050,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	AD5272_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	AD5274_020,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	AD5274_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static const struct ad5272_cfg ad5272_cfg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	[AD5272_020] = { .max_pos = 1024, .kohms = 20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	[AD5272_050] = { .max_pos = 1024, .kohms = 50 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	[AD5272_100] = { .max_pos = 1024, .kohms = 100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	[AD5274_020] = { .max_pos = 256,  .kohms = 20,  .shift = 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	[AD5274_100] = { .max_pos = 256,  .kohms = 100, .shift = 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) struct ad5272_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct i2c_client       *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct mutex            lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	const struct ad5272_cfg *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u8                      buf[2] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static const struct iio_chan_spec ad5272_channel = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	.type = IIO_RESISTANCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	.output = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static int ad5272_write(struct ad5272_data *data, int reg, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	data->buf[0] = (reg << 2) | ((val >> 8) & 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	data->buf[1] = (u8)val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	ret = i2c_master_send(data->client, data->buf, sizeof(data->buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	return ret < 0 ? ret : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static int ad5272_read(struct ad5272_data *data, int reg, int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	data->buf[0] = reg << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	data->buf[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	ret = i2c_master_send(data->client, data->buf, sizeof(data->buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	ret = i2c_master_recv(data->client, data->buf, sizeof(data->buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	*val = ((data->buf[0] & 0x3) << 8) | data->buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static int ad5272_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			   int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	struct ad5272_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	case IIO_CHAN_INFO_RAW: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		ret = ad5272_read(data, AD5272_RDAC_RD, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		*val = *val >> data->cfg->shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return ret ? ret : IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		*val = 1000 * data->cfg->kohms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		*val2 = data->cfg->max_pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int ad5272_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			    int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct ad5272_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (mask != IIO_CHAN_INFO_RAW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (val >= data->cfg->max_pos || val < 0 || val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return ad5272_write(data, AD5272_RDAC_WR, val << data->cfg->shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static const struct iio_info ad5272_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.read_raw = ad5272_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.write_raw = ad5272_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int ad5272_reset(struct ad5272_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	reset_gpio = devm_gpiod_get_optional(&data->client->dev, "reset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (IS_ERR(reset_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return PTR_ERR(reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (reset_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		gpiod_set_value(reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		ad5272_write(data, AD5272_RESET, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int ad5272_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	struct ad5272_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	data->cfg = &ad5272_cfg[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	ret = ad5272_reset(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	ret = ad5272_write(data, AD5272_CTL, AD5272_RDAC_WR_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	indio_dev->info = &ad5272_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	indio_dev->channels = &ad5272_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	indio_dev->num_channels = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	indio_dev->name = client->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	return devm_iio_device_register(dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const struct of_device_id ad5272_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	{ .compatible = "adi,ad5272-020", .data = (void *)AD5272_020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	{ .compatible = "adi,ad5272-050", .data = (void *)AD5272_050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	{ .compatible = "adi,ad5272-100", .data = (void *)AD5272_100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	{ .compatible = "adi,ad5274-020", .data = (void *)AD5274_020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	{ .compatible = "adi,ad5274-100", .data = (void *)AD5274_100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MODULE_DEVICE_TABLE(of, ad5272_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const struct i2c_device_id ad5272_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	{ "ad5272-020", AD5272_020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	{ "ad5272-050", AD5272_050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	{ "ad5272-100", AD5272_100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	{ "ad5274-020", AD5274_020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	{ "ad5274-100", AD5274_100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MODULE_DEVICE_TABLE(i2c, ad5272_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static struct i2c_driver ad5272_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		.name	= "ad5272",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		.of_match_table = ad5272_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	.probe		= ad5272_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	.id_table	= ad5272_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) module_i2c_driver(ad5272_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MODULE_AUTHOR("Phil Reid <preid@eletromag.com.au>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MODULE_DESCRIPTION("AD5272 digital potentiometer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MODULE_LICENSE("GPL v2");