^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * IIO multiplexer driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2017 Axentia Technologies AB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Peter Rosin <peda@axentia.se>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/iio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mux/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct mux_ext_info_cache {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) char *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) ssize_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct mux_child {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct mux_ext_info_cache *ext_info_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int cached_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct mux_control *control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct iio_channel *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct iio_chan_spec *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct iio_chan_spec_ext_info *ext_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct mux_child *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int iio_mux_select(struct mux *mux, int idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct mux_child *child = &mux->child[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct iio_chan_spec const *chan = &mux->chan[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ret = mux_control_select(mux->control, chan->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) mux->cached_state = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (mux->cached_state == chan->channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (chan->ext_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) for (i = 0; chan->ext_info[i].name; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) const char *attr = chan->ext_info[i].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct mux_ext_info_cache *cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) cache = &child->ext_info_cache[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (cache->size < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ret = iio_write_channel_ext_info(mux->parent, attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) cache->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) cache->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) mux_control_deselect(mux->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) mux->cached_state = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) mux->cached_state = chan->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static void iio_mux_deselect(struct mux *mux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) mux_control_deselect(mux->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int mux_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct mux *mux = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int idx = chan - mux->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ret = iio_mux_select(mux, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ret = iio_read_channel_raw(mux->parent, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ret = iio_read_channel_scale(mux->parent, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) iio_mux_deselect(mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int mux_read_avail(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) const int **vals, int *type, int *length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct mux *mux = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int idx = chan - mux->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ret = iio_mux_select(mux, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) *type = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ret = iio_read_avail_channel_raw(mux->parent, vals, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) iio_mux_deselect(mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int mux_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct mux *mux = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int idx = chan - mux->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ret = iio_mux_select(mux, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ret = iio_write_channel_raw(mux->parent, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) iio_mux_deselect(mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static const struct iio_info mux_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .read_raw = mux_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .read_avail = mux_read_avail,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .write_raw = mux_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static ssize_t mux_read_ext_info(struct iio_dev *indio_dev, uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct iio_chan_spec const *chan, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct mux *mux = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int idx = chan - mux->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ret = iio_mux_select(mux, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ret = iio_read_channel_ext_info(mux->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) mux->ext_info[private].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) iio_mux_deselect(mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static ssize_t mux_write_ext_info(struct iio_dev *indio_dev, uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct device *dev = indio_dev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct mux *mux = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int idx = chan - mux->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) char *new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (len >= PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) ret = iio_mux_select(mux, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) new = devm_kmemdup(dev, buf, len + 1, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (!new) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) iio_mux_deselect(mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) new[len] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ret = iio_write_channel_ext_info(mux->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) mux->ext_info[private].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) iio_mux_deselect(mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) devm_kfree(dev, new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) devm_kfree(dev, mux->child[idx].ext_info_cache[private].data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) mux->child[idx].ext_info_cache[private].data = new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) mux->child[idx].ext_info_cache[private].size = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) iio_mux_deselect(mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int mux_configure_channel(struct device *dev, struct mux *mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u32 state, const char *label, int idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct mux_child *child = &mux->child[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct iio_chan_spec *chan = &mux->chan[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct iio_chan_spec const *pchan = mux->parent->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) char *page = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int num_ext_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) chan->indexed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) chan->output = pchan->output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) chan->datasheet_name = label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) chan->ext_info = mux->ext_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ret = iio_get_channel_type(mux->parent, &chan->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dev_err(dev, "failed to get parent channel type\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (iio_channel_has_info(pchan, IIO_CHAN_INFO_RAW))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) chan->info_mask_separate |= BIT(IIO_CHAN_INFO_RAW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (iio_channel_has_info(pchan, IIO_CHAN_INFO_SCALE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) chan->info_mask_separate |= BIT(IIO_CHAN_INFO_SCALE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (iio_channel_has_available(pchan, IIO_CHAN_INFO_RAW))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) chan->info_mask_separate_available |= BIT(IIO_CHAN_INFO_RAW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (state >= mux_control_states(mux->control)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) dev_err(dev, "too many channels\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) chan->channel = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) num_ext_info = iio_get_channel_ext_info_count(mux->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (num_ext_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) page = devm_kzalloc(dev, PAGE_SIZE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (!page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) child->ext_info_cache = devm_kcalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) num_ext_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) sizeof(*child->ext_info_cache),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (!child->ext_info_cache)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) for (i = 0; i < num_ext_info; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) child->ext_info_cache[i].size = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (!pchan->ext_info[i].write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (!pchan->ext_info[i].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ret = iio_read_channel_ext_info(mux->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) mux->ext_info[i].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) dev_err(dev, "failed to get ext_info '%s'\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) pchan->ext_info[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (ret >= PAGE_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev_err(dev, "too large ext_info '%s'\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) pchan->ext_info[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) child->ext_info_cache[i].data = devm_kmemdup(dev, page, ret + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (!child->ext_info_cache[i].data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) child->ext_info_cache[i].data[ret] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) child->ext_info_cache[i].size = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) devm_kfree(dev, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * Same as of_property_for_each_string(), but also keeps track of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * index of each string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define of_property_for_each_string_index(np, propname, prop, s, i) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) for (prop = of_find_property(np, propname, NULL), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) s = of_prop_next_string(prop, NULL), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) i = 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) s; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) s = of_prop_next_string(prop, s), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static int mux_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct iio_channel *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct mux *mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct property *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) const char *label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) u32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) int sizeof_ext_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) int children;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int sizeof_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) parent = devm_iio_channel_get(dev, "parent");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (IS_ERR(parent))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return dev_err_probe(dev, PTR_ERR(parent),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) "failed to get parent channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) sizeof_ext_info = iio_get_channel_ext_info_count(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (sizeof_ext_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) sizeof_ext_info += 1; /* one extra entry for the sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) sizeof_ext_info *= sizeof(*mux->ext_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) children = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) of_property_for_each_string(np, "channels", prop, label) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (*label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) children++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (children <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dev_err(dev, "not even a single child\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) sizeof_priv = sizeof(*mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) sizeof_priv += sizeof(*mux->child) * children;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) sizeof_priv += sizeof(*mux->chan) * children;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) sizeof_priv += sizeof_ext_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) indio_dev = devm_iio_device_alloc(dev, sizeof_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) mux = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) mux->child = (struct mux_child *)(mux + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) mux->chan = (struct iio_chan_spec *)(mux->child + children);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) platform_set_drvdata(pdev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) mux->parent = parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) mux->cached_state = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) indio_dev->name = dev_name(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) indio_dev->info = &mux_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) indio_dev->channels = mux->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) indio_dev->num_channels = children;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (sizeof_ext_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) mux->ext_info = devm_kmemdup(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) parent->channel->ext_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) sizeof_ext_info, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (!mux->ext_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) for (i = 0; mux->ext_info[i].name; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (parent->channel->ext_info[i].read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) mux->ext_info[i].read = mux_read_ext_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (parent->channel->ext_info[i].write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) mux->ext_info[i].write = mux_write_ext_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) mux->ext_info[i].private = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) mux->control = devm_mux_control_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (IS_ERR(mux->control)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (PTR_ERR(mux->control) != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) dev_err(dev, "failed to get control-mux\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return PTR_ERR(mux->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) of_property_for_each_string_index(np, "channels", prop, label, state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (!*label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) ret = mux_configure_channel(dev, mux, state, label, i++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) ret = devm_iio_device_register(dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) dev_err(dev, "failed to register iio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static const struct of_device_id mux_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) { .compatible = "io-channel-mux" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) MODULE_DEVICE_TABLE(of, mux_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static struct platform_driver mux_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .probe = mux_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .name = "iio-mux",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .of_match_table = mux_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) module_platform_driver(mux_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) MODULE_DESCRIPTION("IIO multiplexer driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) MODULE_AUTHOR("Peter Rosin <peda@axentia.se>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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