^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * vl6180.c - Support for STMicroelectronics VL6180 ALS, range and proximity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2017 Peter Meerwald-Stadler <pmeerw@pmeerw.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright 2017 Manivannan Sadhasivam <manivannanece23@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * IIO driver for VL6180 (7-bit I2C slave address 0x29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Range: 0 to 100mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * ALS: < 1 Lux up to 100 kLux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * IR: 850nm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * TODO: threshold events, continuous mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/util_macros.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/iio/kfifo_buf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define VL6180_DRV_NAME "vl6180"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Device identification register and value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define VL6180_MODEL_ID 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define VL6180_MODEL_ID_VAL 0xb4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Configuration registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define VL6180_SYS_MODE_GPIO1 0x011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define VL6180_INTR_CONFIG 0x014
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define VL6180_INTR_CLEAR 0x015
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define VL6180_OUT_OF_RESET 0x016
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define VL6180_HOLD 0x017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define VL6180_RANGE_START 0x018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define VL6180_RANGE_INTER_MES_PERIOD 0x01b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define VL6180_ALS_START 0x038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define VL6180_ALS_THRESH_HIGH 0x03a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define VL6180_ALS_THRESH_LOW 0x03c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define VL6180_ALS_INTER_MES_PERIOD 0x03e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define VL6180_ALS_GAIN 0x03f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define VL6180_ALS_IT 0x040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Status registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define VL6180_RANGE_STATUS 0x04d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define VL6180_ALS_STATUS 0x04e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define VL6180_INTR_STATUS 0x04f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Result value registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define VL6180_ALS_VALUE 0x050
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define VL6180_RANGE_VALUE 0x062
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define VL6180_RANGE_RATE 0x066
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define VL6180_RANGE_THRESH_HIGH 0x019
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define VL6180_RANGE_THRESH_LOW 0x01a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define VL6180_RANGE_MAX_CONVERGENCE_TIME 0x01c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define VL6180_RANGE_CROSSTALK_COMPENSATION_RATE 0x01e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define VL6180_RANGE_PART_TO_PART_RANGE_OFFSET 0x024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define VL6180_RANGE_RANGE_IGNORE_VALID_HEIGHT 0x025
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define VL6180_RANGE_RANGE_IGNORE_THRESHOLD 0x026
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define VL6180_RANGE_MAX_AMBIENT_LEVEL_MULT 0x02c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define VL6180_RANGE_RANGE_CHECK_ENABLES 0x02d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define VL6180_RANGE_VHV_RECALIBRATE 0x02e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define VL6180_RANGE_VHV_REPEAT_RATE 0x031
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define VL6180_READOUT_AVERAGING_SAMPLE_PERIOD 0x10a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* bits of the SYS_MODE_GPIO1 register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define VL6180_SYS_GPIO1_POLARITY BIT(5) /* active high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define VL6180_SYS_GPIO1_SELECT BIT(4) /* configure GPIO interrupt output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* bits of the RANGE_START and ALS_START register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define VL6180_MODE_CONT BIT(1) /* continuous mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define VL6180_STARTSTOP BIT(0) /* start measurement, auto-reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* bits of the INTR_STATUS and INTR_CONFIG register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define VL6180_ALS_LEVEL_LOW BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define VL6180_ALS_LEVEL_HIGH BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define VL6180_ALS_OUT_OF_WINDOW (BIT(3) | BIT(4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define VL6180_ALS_READY BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define VL6180_RANGE_LEVEL_LOW BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define VL6180_RANGE_LEVEL_HIGH BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define VL6180_RANGE_OUT_OF_WINDOW (BIT(0) | BIT(1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define VL6180_RANGE_READY BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define VL6180_INT_RANGE_GPIO_MASK GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define VL6180_INT_ALS_GPIO_MASK GENMASK(5, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define VL6180_INT_ERR_GPIO_MASK GENMASK(7, 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* bits of the INTR_CLEAR register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define VL6180_CLEAR_ERROR BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define VL6180_CLEAR_ALS BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define VL6180_CLEAR_RANGE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* bits of the HOLD register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define VL6180_HOLD_ON BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* default value for the ALS_IT register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define VL6180_ALS_IT_100 0x63 /* 100 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* values for the ALS_GAIN register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define VL6180_ALS_GAIN_1 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define VL6180_ALS_GAIN_1_25 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define VL6180_ALS_GAIN_1_67 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define VL6180_ALS_GAIN_2_5 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define VL6180_ALS_GAIN_5 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define VL6180_ALS_GAIN_10 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define VL6180_ALS_GAIN_20 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define VL6180_ALS_GAIN_40 0x47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct vl6180_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned int als_gain_milli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned int als_it_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct gpio_desc *avdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct gpio_desc *chip_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* Ensure natural alignment of timestamp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u16 channels[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) s64 ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) } scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) enum { VL6180_ALS, VL6180_RANGE, VL6180_PROX };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * struct vl6180_chan_regs - Registers for accessing channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * @drdy_mask: Data ready bit in status register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * @start_reg: Conversion start register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * @value_reg: Result value register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * @word: Register word length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct vl6180_chan_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u8 drdy_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u16 start_reg, value_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) bool word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const struct vl6180_chan_regs vl6180_chan_regs_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) [VL6180_ALS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .drdy_mask = VL6180_ALS_READY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .start_reg = VL6180_ALS_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .value_reg = VL6180_ALS_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .word = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) [VL6180_RANGE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .drdy_mask = VL6180_RANGE_READY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .start_reg = VL6180_RANGE_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .value_reg = VL6180_RANGE_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .word = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) [VL6180_PROX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .drdy_mask = VL6180_RANGE_READY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .start_reg = VL6180_RANGE_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .value_reg = VL6180_RANGE_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .word = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * struct vl6180_custom_data - Data for custom initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * @reg: Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * @val: Value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct vl6180_custom_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const struct vl6180_custom_data vl6180_custom_data_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { .reg = 0x207, .val = 0x01, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { .reg = 0x208, .val = 0x01, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { .reg = 0x096, .val = 0x00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { .reg = 0x097, .val = 0xfd, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) { .reg = 0x0e3, .val = 0x00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) { .reg = 0x0e4, .val = 0x04, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) { .reg = 0x0e5, .val = 0x02, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) { .reg = 0x0e6, .val = 0x01, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) { .reg = 0x0e7, .val = 0x03, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) { .reg = 0x0f5, .val = 0x02, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) { .reg = 0x0d9, .val = 0x05, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) { .reg = 0x0db, .val = 0xce, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) { .reg = 0x0dc, .val = 0x03, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) { .reg = 0x0dd, .val = 0xf8, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) { .reg = 0x09f, .val = 0x00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) { .reg = 0x0a3, .val = 0x3c, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { .reg = 0x0b7, .val = 0x00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) { .reg = 0x0bb, .val = 0x3c, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) { .reg = 0x0b2, .val = 0x09, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) { .reg = 0x0ca, .val = 0x09, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) { .reg = 0x198, .val = 0x01, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) { .reg = 0x1b0, .val = 0x17, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) { .reg = 0x1ad, .val = 0x00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) { .reg = 0x0ff, .val = 0x05, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { .reg = 0x100, .val = 0x05, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) { .reg = 0x199, .val = 0x05, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) { .reg = 0x1a6, .val = 0x1b, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) { .reg = 0x1ac, .val = 0x3e, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) { .reg = 0x1a7, .val = 0x1f, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) { .reg = 0x030, .val = 0x00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static int vl6180_read(struct i2c_client *client, u16 cmd, void *databuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u8 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) __be16 cmdbuf = cpu_to_be16(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct i2c_msg msgs[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) { .addr = client->addr, .len = sizeof(cmdbuf), .buf = (u8 *) &cmdbuf },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) { .addr = client->addr, .len = len, .buf = databuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .flags = I2C_M_RD } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) dev_err(&client->dev, "failed reading register 0x%04x\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int vl6180_read_byte(struct i2c_client *client, u16 cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = vl6180_read(client, cmd, &data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int vl6180_read_word(struct i2c_client *client, u16 cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) __be16 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ret = vl6180_read(client, cmd, &data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return be16_to_cpu(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static int vl6180_write_byte(struct i2c_client *client, u16 cmd, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) u8 buf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct i2c_msg msgs[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) { .addr = client->addr, .len = sizeof(buf), .buf = (u8 *) &buf } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) buf[0] = cmd >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) buf[1] = cmd & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) buf[2] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) dev_err(&client->dev, "failed writing register 0x%04x\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static int vl6180_write_word(struct i2c_client *client, u16 cmd, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) __be16 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct i2c_msg msgs[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) { .addr = client->addr, .len = sizeof(buf), .buf = (u8 *) &buf } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) buf[0] = cpu_to_be16(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) buf[1] = cpu_to_be16(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) dev_err(&client->dev, "failed writing register 0x%04x\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static int vl6180_measure(struct vl6180_data *data, int addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int tries = 20, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) u16 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* Start single shot measurement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ret = vl6180_write_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) vl6180_chan_regs_table[addr].start_reg, VL6180_STARTSTOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) while (tries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ret = vl6180_read_byte(client, VL6180_INTR_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (ret & vl6180_chan_regs_table[addr].drdy_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (tries < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* Read result value from appropriate registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ret = vl6180_chan_regs_table[addr].word ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) vl6180_read_word(client, vl6180_chan_regs_table[addr].value_reg) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) vl6180_read_byte(client, vl6180_chan_regs_table[addr].value_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) value = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* Clear the interrupt flag after data read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ret = vl6180_write_byte(client, VL6180_INTR_CLEAR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) VL6180_CLEAR_ERROR | VL6180_CLEAR_ALS | VL6180_CLEAR_RANGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) ret = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static const struct iio_chan_spec vl6180_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .type = IIO_LIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .address = VL6180_ALS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) BIT(IIO_CHAN_INFO_INT_TIME) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) BIT(IIO_CHAN_INFO_HARDWAREGAIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .sign = 'u',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .realbits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .storagebits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .type = IIO_DISTANCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .address = VL6180_RANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .scan_index = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .sign = 'u',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .realbits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .storagebits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .type = IIO_PROXIMITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .address = VL6180_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .scan_index = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .sign = 'u',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .realbits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .storagebits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) IIO_CHAN_SOFT_TIMESTAMP(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * Available Ambient Light Sensor gain settings, 1/1000th, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * corresponding setting for the VL6180_ALS_GAIN register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static const int vl6180_als_gain_tab[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 1000, 1250, 1670, 2500, 5000, 10000, 20000, 40000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static const u8 vl6180_als_gain_tab_bits[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) VL6180_ALS_GAIN_1, VL6180_ALS_GAIN_1_25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) VL6180_ALS_GAIN_1_67, VL6180_ALS_GAIN_2_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) VL6180_ALS_GAIN_5, VL6180_ALS_GAIN_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) VL6180_ALS_GAIN_20, VL6180_ALS_GAIN_40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static int vl6180_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct vl6180_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ret = vl6180_measure(data, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) *val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) *val = data->als_it_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) *val2 = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /* one ALS count is 0.32 Lux @ gain 1, IT 100 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) *val = 32000; /* 0.32 * 1000 * 100 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) *val2 = data->als_gain_milli * data->als_it_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) case IIO_DISTANCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) *val = 0; /* sensor reports mm, scale to meter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) *val2 = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) *val = data->als_gain_milli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) *val2 = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static IIO_CONST_ATTR(als_gain_available, "1 1.25 1.67 2.5 5 10 20 40");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static struct attribute *vl6180_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) &iio_const_attr_als_gain_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static const struct attribute_group vl6180_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .attrs = vl6180_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) /* HOLD is needed before updating any config registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static int vl6180_hold(struct vl6180_data *data, bool hold)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return vl6180_write_byte(data->client, VL6180_HOLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) hold ? VL6180_HOLD_ON : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static int vl6180_set_als_gain(struct vl6180_data *data, int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) int i, ret, gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (val < 1 || val > 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) gain = (val * 1000000 + val2) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (gain < 1 || gain > 40000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) i = find_closest(gain, vl6180_als_gain_tab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) ARRAY_SIZE(vl6180_als_gain_tab));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ret = vl6180_hold(data, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) ret = vl6180_write_byte(data->client, VL6180_ALS_GAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) vl6180_als_gain_tab_bits[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) data->als_gain_milli = vl6180_als_gain_tab[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) vl6180_hold(data, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static int vl6180_set_it(struct vl6180_data *data, int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) int ret, it_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) it_ms = (val2 + 500) / 1000; /* round to ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (val != 0 || it_ms < 1 || it_ms > 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) ret = vl6180_hold(data, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) ret = vl6180_write_word(data->client, VL6180_ALS_IT, it_ms - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) data->als_it_ms = it_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) vl6180_hold(data, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static int vl6180_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct vl6180_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return vl6180_set_it(data, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) if (chan->type != IIO_LIGHT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return vl6180_set_als_gain(data, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static const struct iio_info vl6180_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .read_raw = vl6180_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .write_raw = vl6180_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .attrs = &vl6180_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static int vl6180_power_enable(struct vl6180_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* Enable power supply. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (!IS_ERR_OR_NULL(data->avdd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) gpiod_set_value_cansleep(data->avdd, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /* Power-up default is chip enable (CE). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (!IS_ERR_OR_NULL(data->chip_enable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) gpiod_set_value_cansleep(data->chip_enable, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) usleep_range(500, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) gpiod_set_value_cansleep(data->chip_enable, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static int vl6180_custom_init(struct vl6180_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) /* REGISTER_TUNING_SR03_270514_CustomerView.txt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) for (i = 0; i < ARRAY_SIZE(vl6180_custom_data_table); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) ret = vl6180_write_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) vl6180_custom_data_table[i].reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) vl6180_custom_data_table[i].val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static int vl6180_range_init(struct vl6180_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) u8 enables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) u8 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) u8 xtalk = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Enables polling for ‘New Sample ready’ when measurement completes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) ret = vl6180_write_byte(client, VL6180_SYS_MODE_GPIO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) (VL6180_SYS_GPIO1_POLARITY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) VL6180_SYS_GPIO1_SELECT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /* Set the averaging sample period (compromise between lower noise and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * increased execution time), 0x30 equals to 4.3 ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) ret = vl6180_write_byte(client, VL6180_READOUT_AVERAGING_SAMPLE_PERIOD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /* Sets the # of range measurements after which auto calibration of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) * system is performed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ret = vl6180_write_byte(client, VL6180_RANGE_VHV_REPEAT_RATE, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* Perform a single temperature calibration of the ranging sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) ret = vl6180_write_byte(client, VL6180_RANGE_VHV_RECALIBRATE, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* Set SNR limit to 0.06 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) ret = vl6180_write_byte(client, VL6180_RANGE_MAX_AMBIENT_LEVEL_MULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /* Set default ranging inter-measurement period to 100ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) ret = vl6180_write_byte(client, VL6180_RANGE_INTER_MES_PERIOD, 0x09);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /* Copy registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) /* NOTE: 0x0da, 0x027, 0x0db, 0x028, 0x0dc, 0x029 and 0x0dd are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * unavailable on the datasheet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ret = vl6180_read_byte(client, VL6180_RANGE_RANGE_IGNORE_THRESHOLD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) ret = vl6180_write_byte(client, 0x0da, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) ret = vl6180_read_byte(client, 0x027);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) ret = vl6180_write_byte(client, 0x0db, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) ret = vl6180_read_byte(client, 0x028);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ret = vl6180_write_byte(client, 0x0dc, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) ret = vl6180_read_byte(client, 0x029);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) ret = vl6180_write_byte(client, 0x0dd, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) ret = vl6180_write_byte(client, VL6180_RANGE_MAX_CONVERGENCE_TIME, 0x32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) ret = vl6180_read_byte(client, VL6180_RANGE_RANGE_CHECK_ENABLES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) /* Disable early convergence */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) enables = ret & 0xfe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) ret = vl6180_write_byte(client, VL6180_RANGE_RANGE_CHECK_ENABLES, enables);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) ret = vl6180_write_byte(client, VL6180_RANGE_THRESH_HIGH, 0xc8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) ret = vl6180_write_byte(client, VL6180_RANGE_THRESH_LOW, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) ret = vl6180_write_byte(client, VL6180_ALS_IT, VL6180_ALS_IT_100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) ret = vl6180_write_byte(client, VL6180_ALS_INTER_MES_PERIOD, 0x13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) ret = vl6180_write_byte(client, VL6180_ALS_GAIN, VL6180_ALS_GAIN_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) ret = vl6180_write_byte(client, VL6180_ALS_THRESH_LOW, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) ret = vl6180_write_byte(client, VL6180_ALS_THRESH_HIGH, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) /* Cover glass ignore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ret = vl6180_write_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) VL6180_RANGE_RANGE_IGNORE_VALID_HEIGHT, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ret = vl6180_read_byte(client, VL6180_RANGE_PART_TO_PART_RANGE_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) /* Apply default calibration on part to part offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) offset = ret / 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) ret = vl6180_write_byte(client, VL6180_RANGE_PART_TO_PART_RANGE_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) ret = vl6180_write_byte(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) VL6180_RANGE_CROSSTALK_COMPENSATION_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) ret = vl6180_write_byte(client, 0x01f, xtalk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static int vl6180_init(struct vl6180_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) ret = vl6180_power_enable(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) dev_err(&client->dev, "failed to configure power\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * After the MCU boot sequence the device enters software standby,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * host initialization can commence immediately after entering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * software standby.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) usleep_range(500, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) ret = vl6180_read_byte(client, VL6180_MODEL_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) if (ret != VL6180_MODEL_ID_VAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) dev_err(&client->dev, "invalid model ID %02x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) ret = vl6180_hold(data, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) ret = vl6180_read_byte(client, VL6180_OUT_OF_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) * Detect false reset condition here. This bit is always set when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) * system comes out of reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (ret != 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) dev_info(&client->dev, "device is not fresh out of reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) /* ALS integration time: 100ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) data->als_it_ms = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) ret = vl6180_write_word(client, VL6180_ALS_IT, VL6180_ALS_IT_100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) /* ALS gain: 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) data->als_gain_milli = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) ret = vl6180_write_byte(client, VL6180_ALS_GAIN, VL6180_ALS_GAIN_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) ret = vl6180_custom_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) ret = vl6180_range_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) ret = vl6180_write_byte(client, VL6180_RANGE_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) (VL6180_STARTSTOP | VL6180_MODE_CONT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) ret = vl6180_write_byte(client, VL6180_OUT_OF_RESET, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) return vl6180_hold(data, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) static irqreturn_t vl6180_irq_thread(int irq, void *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) struct vl6180_data *data = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) struct iio_dev *indio_dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) u8 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) ret = vl6180_read_byte(client, VL6180_INTR_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (ret & VL6180_INT_ALS_GPIO_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) val |= VL6180_CLEAR_ALS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) if (ret & VL6180_INT_RANGE_GPIO_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) val |= VL6180_CLEAR_RANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) if (ret & VL6180_INT_ERR_GPIO_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) val |= VL6180_CLEAR_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) vl6180_write_byte(client, VL6180_INTR_CLEAR, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) ret = vl6180_read_word(client, VL6180_ALS_VALUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) data->scan.channels[VL6180_ALS] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) ret = vl6180_read_byte(client, VL6180_RANGE_VALUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) data->scan.channels[VL6180_RANGE] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) ret = vl6180_read_word(client, VL6180_RANGE_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) data->scan.channels[VL6180_PROX] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) ktime_get_boottime_ns());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) static int vl6180_buffer_preenable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) struct vl6180_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) ret = vl6180_read_byte(data->client, VL6180_INTR_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) /* Enable ALS and Range ready interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) val = ret | VL6180_ALS_READY | VL6180_RANGE_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) ret = vl6180_write_byte(data->client, VL6180_INTR_CONFIG, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) static int vl6180_buffer_postdisable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) struct vl6180_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) ret = vl6180_read_byte(data->client, VL6180_INTR_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) /* Disable ALS and Range ready interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) val = ret & ~(VL6180_ALS_READY | VL6180_RANGE_READY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) ret = vl6180_write_byte(data->client, VL6180_INTR_CONFIG, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) static const struct iio_buffer_setup_ops vl6180_buffer_setup_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .preenable = vl6180_buffer_preenable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) .postdisable = vl6180_buffer_postdisable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) static int vl6180_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) struct vl6180_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) struct iio_buffer *buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) u32 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) indio_dev->info = &vl6180_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) indio_dev->channels = vl6180_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) indio_dev->num_channels = ARRAY_SIZE(vl6180_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) indio_dev->name = VL6180_DRV_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) * NOTE: If the power is controlled by gpio, the power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) * configuration should match the power-up timing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) data->avdd = devm_gpiod_get_optional(&client->dev, "avdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) data->chip_enable = devm_gpiod_get_optional(&client->dev, "chip-enable",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) ret = vl6180_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (client->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) buffer = devm_iio_kfifo_allocate(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (!buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) iio_device_attach_buffer(indio_dev, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) indio_dev->setup_ops = &vl6180_buffer_setup_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) type = irqd_get_trigger_type(irq_get_irq_data(client->irq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) ret = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) NULL, vl6180_irq_thread,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) type | IRQF_ONESHOT, "vl6180",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) "failed to request vl6180 IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) return devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) static const struct of_device_id vl6180_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) { .compatible = "st,vl6180", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) MODULE_DEVICE_TABLE(of, vl6180_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static const struct i2c_device_id vl6180_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) { "vl6180", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) MODULE_DEVICE_TABLE(i2c, vl6180_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) static struct i2c_driver vl6180_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .name = VL6180_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .of_match_table = vl6180_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .probe = vl6180_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .id_table = vl6180_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) module_i2c_driver(vl6180_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) MODULE_AUTHOR("Peter Meerwald-Stadler <pmeerw@pmeerw.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) MODULE_AUTHOR("Manivannan Sadhasivam <manivannanece23@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) MODULE_DESCRIPTION("STMicro VL6180 ALS, range and proximity sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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