Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * VEML6030 Ambient Light Sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2019, Rishi Gupta <gupt21@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Datasheet: https://www.vishay.com/docs/84366/veml6030.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Appnote-84367: https://www.vishay.com/docs/84367/designingveml6030.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/iio/events.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /* Device registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define VEML6030_REG_ALS_CONF   0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define VEML6030_REG_ALS_WH     0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define VEML6030_REG_ALS_WL     0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define VEML6030_REG_ALS_PSM    0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define VEML6030_REG_ALS_DATA   0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define VEML6030_REG_WH_DATA    0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define VEML6030_REG_ALS_INT    0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /* Bit masks for specific functionality */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define VEML6030_ALS_IT       GENMASK(9, 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define VEML6030_PSM          GENMASK(2, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define VEML6030_ALS_PERS     GENMASK(5, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define VEML6030_ALS_GAIN     GENMASK(12, 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define VEML6030_PSM_EN       BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define VEML6030_INT_TH_LOW   BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define VEML6030_INT_TH_HIGH  BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define VEML6030_ALS_INT_EN   BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define VEML6030_ALS_SD       BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * The resolution depends on both gain and integration time. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * cur_resolution stores one of the resolution mentioned in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * table during startup and gets updated whenever integration time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * or gain is changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * Table 'resolution and maximum detection range' in appnote 84367
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * is visualized as a 2D array. The cur_gain stores index of gain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * in this table (0-3) while the cur_integration_time holds index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * of integration time (0-5).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) struct veml6030_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int cur_resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int cur_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	int cur_integration_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) /* Integration time available in seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static IIO_CONST_ATTR(in_illuminance_integration_time_available,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 				"0.025 0.05 0.1 0.2 0.4 0.8");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * Scale is 1/gain. Value 0.125 is ALS gain x (1/8), 0.25 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * ALS gain x (1/4), 1.0 = ALS gain x 1 and 2.0 is ALS gain x 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static IIO_CONST_ATTR(in_illuminance_scale_available,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 				"0.125 0.25 1.0 2.0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static struct attribute *veml6030_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	&iio_const_attr_in_illuminance_integration_time_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	&iio_const_attr_in_illuminance_scale_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static const struct attribute_group veml6030_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	.attrs = veml6030_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * Persistence = 1/2/4/8 x integration time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  * Minimum time for which light readings must stay above configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * threshold to assert the interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static const char * const period_values[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		"0.1 0.2 0.4 0.8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		"0.2 0.4 0.8 1.6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		"0.4 0.8 1.6 3.2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		"0.8 1.6 3.2 6.4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		"0.05 0.1 0.2 0.4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		"0.025 0.050 0.1 0.2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  * Return list of valid period values in seconds corresponding to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  * the currently active integration time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static ssize_t in_illuminance_period_available_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 				struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	int ret, reg, x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 				"can't read als conf register %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	ret = ((reg >> 6) & 0xF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	switch (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		x = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		x = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	case 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		x = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return snprintf(buf, PAGE_SIZE, "%s\n", period_values[x]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static IIO_DEVICE_ATTR_RO(in_illuminance_period_available, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static struct attribute *veml6030_event_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	&iio_dev_attr_in_illuminance_period_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const struct attribute_group veml6030_event_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	.attrs = veml6030_event_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int veml6030_als_pwr_on(struct veml6030_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	return regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 				 VEML6030_ALS_SD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int veml6030_als_shut_down(struct veml6030_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	return regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 				 VEML6030_ALS_SD, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static void veml6030_als_shut_down_action(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	veml6030_als_shut_down(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static const struct iio_event_spec veml6030_event_spec[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		.type = IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		.dir = IIO_EV_DIR_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		.type = IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		.dir = IIO_EV_DIR_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		.type = IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		.dir = IIO_EV_DIR_EITHER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		.mask_separate = BIT(IIO_EV_INFO_PERIOD) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		BIT(IIO_EV_INFO_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* Channel number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) enum veml6030_chan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	CH_ALS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	CH_WHITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const struct iio_chan_spec veml6030_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		.type = IIO_LIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		.channel = CH_ALS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 				BIT(IIO_CHAN_INFO_PROCESSED) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 				BIT(IIO_CHAN_INFO_INT_TIME) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 				BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		.event_spec = veml6030_event_spec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		.num_event_specs = ARRAY_SIZE(veml6030_event_spec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		.type = IIO_INTENSITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		.channel = CH_WHITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		.modified = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		.channel2 = IIO_MOD_LIGHT_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 				BIT(IIO_CHAN_INFO_PROCESSED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const struct regmap_config veml6030_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	.name = "veml6030_regmap",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	.val_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.max_register = VEML6030_REG_ALS_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.val_format_endian = REGMAP_ENDIAN_LITTLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int veml6030_get_intgrn_tm(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 						int *val, int *val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	int ret, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 				"can't read als conf register %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	switch ((reg >> 6) & 0xF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		*val2 = 100000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		*val2 = 200000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		*val2 = 400000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		*val2 = 800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		*val2 = 50000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	case 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		*val2 = 25000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static int veml6030_set_intgrn_tm(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 						int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	int ret, new_int_time, int_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	switch (val2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	case 25000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		new_int_time = 0x300;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		int_idx = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	case 50000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		new_int_time = 0x200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		int_idx = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	case 100000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		new_int_time = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		int_idx = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	case 200000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		new_int_time = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		int_idx = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	case 400000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		new_int_time = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		int_idx = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	case 800000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		new_int_time = 0xC0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		int_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 					VEML6030_ALS_IT, new_int_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 				"can't update als integration time %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	 * Cache current integration time and update resolution. For every
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	 * increase in integration time to next level, resolution is halved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	 * and vice-versa.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (data->cur_integration_time < int_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		data->cur_resolution <<= int_idx - data->cur_integration_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	else if (data->cur_integration_time > int_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		data->cur_resolution >>= data->cur_integration_time - int_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	data->cur_integration_time = int_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static int veml6030_read_persistence(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 						int *val, int *val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	int ret, reg, period, x, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	ret = veml6030_get_intgrn_tm(indio_dev, &x, &y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 				"can't read als conf register %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	/* integration time multiplied by 1/2/4/8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	period = y * (1 << ((reg >> 4) & 0x03));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	*val = period / 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	*val2 = period % 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static int veml6030_write_persistence(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 						int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	int ret, period, x, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	ret = veml6030_get_intgrn_tm(indio_dev, &x, &y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	if (!val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		period = val2 / y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		if ((val == 1) && (val2 == 600000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 			period = 1600000 / y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		else if ((val == 3) && (val2 == 200000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			period = 3200000 / y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		else if ((val == 6) && (val2 == 400000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 			period = 6400000 / y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			period = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	if (period <= 0 || period > 8 || hweight8(period) != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 				VEML6030_ALS_PERS, (ffs(period) - 1) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 				"can't set persistence value %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static int veml6030_set_als_gain(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 						int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	int ret, new_gain, gain_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	if (val == 0 && val2 == 125000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		new_gain = 0x1000; /* 0x02 << 11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		gain_idx = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	} else if (val == 0 && val2 == 250000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		new_gain = 0x1800;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		gain_idx = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	} else if (val == 1 && val2 == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		new_gain = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		gain_idx = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	} else if (val == 2 && val2 == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		new_gain = 0x800;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 		gain_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 					VEML6030_ALS_GAIN, new_gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 				"can't set als gain %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	 * Cache currently set gain & update resolution. For every
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	 * increase in the gain to next level, resolution is halved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	 * and vice-versa.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	if (data->cur_gain < gain_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		data->cur_resolution <<= gain_idx - data->cur_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	else if (data->cur_gain > gain_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		data->cur_resolution >>= data->cur_gain - gain_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	data->cur_gain = gain_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) static int veml6030_get_als_gain(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 						int *val, int *val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	int ret, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 				"can't read als conf register %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	switch ((reg >> 11) & 0x03) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 		*val = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 		*val2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 		*val = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		*val2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		*val2 = 125000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 		*val2 = 250000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static int veml6030_read_thresh(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 						int *val, int *val2, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	int ret, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	if (dir == IIO_EV_DIR_RISING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		ret = regmap_read(data->regmap, VEML6030_REG_ALS_WH, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 		ret = regmap_read(data->regmap, VEML6030_REG_ALS_WL, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 				"can't read als threshold value %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	*val = reg & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static int veml6030_write_thresh(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 						int val, int val2, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	if (val > 0xFFFF || val < 0 || val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	if (dir == IIO_EV_DIR_RISING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		ret = regmap_write(data->regmap, VEML6030_REG_ALS_WH, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 			dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 					"can't set high threshold %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 		ret = regmap_write(data->regmap, VEML6030_REG_ALS_WL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 			dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 					"can't set low threshold %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)  * Provide both raw as well as light reading in lux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)  * light (in lux) = resolution * raw reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) static int veml6030_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 			    struct iio_chan_spec const *chan, int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 			    int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	int ret, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	struct regmap *regmap = data->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	struct device *dev = &data->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	case IIO_CHAN_INFO_PROCESSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 		case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 			ret = regmap_read(regmap, VEML6030_REG_ALS_DATA, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 			if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 				dev_err(dev, "can't read als data %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 			if (mask == IIO_CHAN_INFO_PROCESSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 				*val = (reg * data->cur_resolution) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 				*val2 = (reg * data->cur_resolution) % 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 				return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 			*val = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 			return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 		case IIO_INTENSITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 			ret = regmap_read(regmap, VEML6030_REG_WH_DATA, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 			if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 				dev_err(dev, "can't read white data %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 			if (mask == IIO_CHAN_INFO_PROCESSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 				*val = (reg * data->cur_resolution) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 				*val2 = (reg * data->cur_resolution) % 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 				return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 			*val = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 			return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 		if (chan->type == IIO_LIGHT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 			return veml6030_get_intgrn_tm(indio_dev, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 		if (chan->type == IIO_LIGHT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 			return veml6030_get_als_gain(indio_dev, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) static int veml6030_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 				struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 				int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 		case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 			return veml6030_set_intgrn_tm(indio_dev, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 		case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 			return veml6030_set_als_gain(indio_dev, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static int veml6030_read_event_val(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		const struct iio_chan_spec *chan, enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 		enum iio_event_direction dir, enum iio_event_info info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 		int *val, int *val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 	switch (info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	case IIO_EV_INFO_VALUE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 		switch (dir) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 		case IIO_EV_DIR_RISING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 		case IIO_EV_DIR_FALLING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 			return veml6030_read_thresh(indio_dev, val, val2, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 	case IIO_EV_INFO_PERIOD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 		return veml6030_read_persistence(indio_dev, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static int veml6030_write_event_val(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 		const struct iio_chan_spec *chan, enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 		enum iio_event_direction dir, enum iio_event_info info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 		int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 	switch (info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	case IIO_EV_INFO_VALUE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 		return veml6030_write_thresh(indio_dev, val, val2, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 	case IIO_EV_INFO_PERIOD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 		return veml6030_write_persistence(indio_dev, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) static int veml6030_read_interrupt_config(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 		const struct iio_chan_spec *chan, enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 		enum iio_event_direction dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	int ret, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 				"can't read als conf register %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 	if (reg & VEML6030_ALS_INT_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)  * Sensor should not be measuring light when interrupt is configured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)  * Therefore correct sequence to configure interrupt functionality is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)  * shut down -> enable/disable interrupt -> power on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)  * state = 1 enables interrupt, state = 0 disables interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static int veml6030_write_interrupt_config(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 		const struct iio_chan_spec *chan, enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 		enum iio_event_direction dir, int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) 	if (state < 0 || state > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	ret = veml6030_als_shut_down(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 			"can't disable als to configure interrupt %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 	/* enable interrupt + power on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 			VEML6030_ALS_INT_EN | VEML6030_ALS_SD, state << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 			"can't enable interrupt & poweron als %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static const struct iio_info veml6030_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 	.read_raw  = veml6030_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 	.write_raw = veml6030_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 	.read_event_value = veml6030_read_event_val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 	.write_event_value	= veml6030_write_event_val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 	.read_event_config = veml6030_read_interrupt_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 	.write_event_config	= veml6030_write_interrupt_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 	.attrs = &veml6030_attr_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 	.event_attrs = &veml6030_event_attr_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) static const struct iio_info veml6030_info_no_irq = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	.read_raw  = veml6030_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 	.write_raw = veml6030_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 	.attrs = &veml6030_attr_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) static irqreturn_t veml6030_event_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 	int ret, reg, evtdir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 	struct iio_dev *indio_dev = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_INT, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 				"can't read als interrupt register %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 		return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 	/* Spurious interrupt handling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 	if (!(reg & (VEML6030_INT_TH_HIGH | VEML6030_INT_TH_LOW)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 		return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 	if (reg & VEML6030_INT_TH_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 		evtdir = IIO_EV_DIR_RISING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 		evtdir = IIO_EV_DIR_FALLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) 	iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 					0, IIO_EV_TYPE_THRESH, evtdir),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 					iio_get_time_ns(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)  * Set ALS gain to 1/8, integration time to 100 ms, PSM to mode 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)  * persistence to 1 x integration time and the threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)  * interrupt disabled by default. First shutdown the sensor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)  * update registers and then power on the sensor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static int veml6030_hw_init(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 	int ret, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 	ret = veml6030_als_shut_down(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) 		dev_err(&client->dev, "can't shutdown als %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) 	ret = regmap_write(data->regmap, VEML6030_REG_ALS_CONF, 0x1001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 		dev_err(&client->dev, "can't setup als configs %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) 	ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_PSM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) 				 VEML6030_PSM | VEML6030_PSM_EN, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 		dev_err(&client->dev, "can't setup default PSM %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 	ret = regmap_write(data->regmap, VEML6030_REG_ALS_WH, 0xFFFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 		dev_err(&client->dev, "can't setup high threshold %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 	ret = regmap_write(data->regmap, VEML6030_REG_ALS_WL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 		dev_err(&client->dev, "can't setup low threshold %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 	ret = veml6030_als_pwr_on(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 		dev_err(&client->dev, "can't poweron als %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) 	/* Wait 4 ms to let processor & oscillator start correctly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 	usleep_range(4000, 4002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) 	/* Clear stale interrupt status bits if any during start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) 	ret = regmap_read(data->regmap, VEML6030_REG_ALS_INT, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) 			"can't clear als interrupt status %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 	/* Cache currently active measurement parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) 	data->cur_gain = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) 	data->cur_resolution = 4608;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 	data->cur_integration_time = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static int veml6030_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) 			  const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) 	struct veml6030_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) 		dev_err(&client->dev, "i2c adapter doesn't support plain i2c\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) 	regmap = devm_regmap_init_i2c(client, &veml6030_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) 		dev_err(&client->dev, "can't setup regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) 		return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) 	data->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) 	indio_dev->name = "veml6030";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) 	indio_dev->channels = veml6030_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) 	indio_dev->num_channels = ARRAY_SIZE(veml6030_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) 	if (client->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) 		ret = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) 						NULL, veml6030_event_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) 						"veml6030", indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) 			dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) 					"irq %d request failed\n", client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) 		indio_dev->info = &veml6030_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) 		indio_dev->info = &veml6030_info_no_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) 	ret = veml6030_hw_init(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) 	ret = devm_add_action_or_reset(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) 					veml6030_als_shut_down_action, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) 	return devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static int __maybe_unused veml6030_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) 	ret = veml6030_als_shut_down(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) 		dev_err(&data->client->dev, "can't suspend als %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) static int __maybe_unused veml6030_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) 	struct veml6030_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) 	ret = veml6030_als_pwr_on(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) 		dev_err(&data->client->dev, "can't resume als %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) static const struct dev_pm_ops veml6030_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) 				pm_runtime_force_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) 	SET_RUNTIME_PM_OPS(veml6030_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) 				veml6030_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) static const struct of_device_id veml6030_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) 	{ .compatible = "vishay,veml6030" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) MODULE_DEVICE_TABLE(of, veml6030_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) static const struct i2c_device_id veml6030_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) 	{ "veml6030", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) MODULE_DEVICE_TABLE(i2c, veml6030_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static struct i2c_driver veml6030_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) 		.name = "veml6030",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) 		.of_match_table = veml6030_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) 		.pm = &veml6030_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) 	.probe = veml6030_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) 	.id_table = veml6030_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) module_i2c_driver(veml6030_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) MODULE_AUTHOR("Rishi Gupta <gupt21@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) MODULE_DESCRIPTION("VEML6030 Ambient Light Sensor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) MODULE_LICENSE("GPL v2");