Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * tcs3414.c - Support for TAOS TCS3414 digital color sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2014 Peter Meerwald <pmeerw@pmeerw.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Digital color sensor with 16-bit channels for red, green, blue, clear);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * 7-bit I2C slave address 0x39 (TCS3414) or 0x29, 0x49, 0x59 (TCS3413,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * TCS3415, TCS3416, resp.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * TODO: sync, interrupt support, thresholds, prescaler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/iio/trigger_consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define TCS3414_DRV_NAME "tcs3414"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define TCS3414_COMMAND BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define TCS3414_COMMAND_WORD (TCS3414_COMMAND | BIT(5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define TCS3414_CONTROL (TCS3414_COMMAND | 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define TCS3414_TIMING (TCS3414_COMMAND | 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define TCS3414_ID (TCS3414_COMMAND | 0x04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define TCS3414_GAIN (TCS3414_COMMAND | 0x07)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define TCS3414_DATA_GREEN (TCS3414_COMMAND_WORD | 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define TCS3414_DATA_RED (TCS3414_COMMAND_WORD | 0x12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define TCS3414_DATA_BLUE (TCS3414_COMMAND_WORD | 0x14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define TCS3414_DATA_CLEAR (TCS3414_COMMAND_WORD | 0x16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define TCS3414_CONTROL_ADC_VALID BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define TCS3414_CONTROL_ADC_EN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define TCS3414_CONTROL_POWER BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define TCS3414_INTEG_MASK GENMASK(1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define TCS3414_INTEG_12MS 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define TCS3414_INTEG_100MS 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define TCS3414_INTEG_400MS 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define TCS3414_GAIN_MASK GENMASK(5, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define TCS3414_GAIN_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) struct tcs3414_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u8 control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u8 gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u8 timing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	/* Ensure timestamp is naturally aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		u16 chans[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		s64 timestamp __aligned(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	} scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define TCS3414_CHANNEL(_color, _si, _addr) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.type = IIO_INTENSITY, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	.modified = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		BIT(IIO_CHAN_INFO_INT_TIME), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	.channel2 = IIO_MOD_LIGHT_##_color, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	.address = _addr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.scan_index = _si, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		.sign = 'u', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		.realbits = 16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		.storagebits = 16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		.endianness = IIO_CPU, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	}, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) /* scale factors: 1/gain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static const int tcs3414_scales[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	{1, 0}, {0, 250000}, {0, 62500}, {0, 15625}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) /* integration time in ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static const int tcs3414_times[] = { 12, 100, 400 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static const struct iio_chan_spec tcs3414_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	TCS3414_CHANNEL(GREEN, 0, TCS3414_DATA_GREEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	TCS3414_CHANNEL(RED, 1, TCS3414_DATA_RED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	TCS3414_CHANNEL(BLUE, 2, TCS3414_DATA_BLUE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	TCS3414_CHANNEL(CLEAR, 3, TCS3414_DATA_CLEAR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	IIO_CHAN_SOFT_TIMESTAMP(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static int tcs3414_req_data(struct tcs3414_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int tries = 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	ret = i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		data->control | TCS3414_CONTROL_ADC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	while (tries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		ret = i2c_smbus_read_byte_data(data->client, TCS3414_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		if (ret & TCS3414_CONTROL_ADC_VALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	ret = i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		data->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	if (tries < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		dev_err(&data->client->dev, "data not ready\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int tcs3414_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			   int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct tcs3414_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		ret = iio_device_claim_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		ret = tcs3414_req_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			iio_device_release_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		ret = i2c_smbus_read_word_data(data->client, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		iio_device_release_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		*val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		i = (data->gain & TCS3414_GAIN_MASK) >> TCS3414_GAIN_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		*val = tcs3414_scales[i][0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		*val2 = tcs3414_scales[i][1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		*val2 = tcs3414_times[data->timing & TCS3414_INTEG_MASK] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static int tcs3414_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			       struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			       int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct tcs3414_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		for (i = 0; i < ARRAY_SIZE(tcs3414_scales); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			if (val == tcs3414_scales[i][0] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 				val2 == tcs3414_scales[i][1]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 				data->gain &= ~TCS3414_GAIN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 				data->gain |= i << TCS3414_GAIN_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 				return i2c_smbus_write_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 					data->client, TCS3414_GAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 					data->gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		if (val != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		for (i = 0; i < ARRAY_SIZE(tcs3414_times); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			if (val2 == tcs3414_times[i] * 1000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 				data->timing &= ~TCS3414_INTEG_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 				data->timing |= i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 				return i2c_smbus_write_byte_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 					data->client, TCS3414_TIMING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 					data->timing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static irqreturn_t tcs3414_trigger_handler(int irq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	struct iio_poll_func *pf = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	struct iio_dev *indio_dev = pf->indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	struct tcs3414_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	int i, j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	for_each_set_bit(i, indio_dev->active_scan_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		indio_dev->masklength) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		int ret = i2c_smbus_read_word_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			TCS3414_DATA_GREEN + 2*i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		data->scan.chans[j++] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		iio_get_time_ns(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	iio_trigger_notify_done(indio_dev->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static IIO_CONST_ATTR(scale_available, "1 0.25 0.0625 0.015625");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static IIO_CONST_ATTR_INT_TIME_AVAIL("0.012 0.1 0.4");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static struct attribute *tcs3414_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	&iio_const_attr_scale_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	&iio_const_attr_integration_time_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static const struct attribute_group tcs3414_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	.attrs = tcs3414_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const struct iio_info tcs3414_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	.read_raw = tcs3414_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	.write_raw = tcs3414_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	.attrs = &tcs3414_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static int tcs3414_buffer_postenable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	struct tcs3414_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	data->control |= TCS3414_CONTROL_ADC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		data->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static int tcs3414_buffer_predisable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	struct tcs3414_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	data->control &= ~TCS3414_CONTROL_ADC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		data->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static const struct iio_buffer_setup_ops tcs3414_buffer_setup_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	.postenable = tcs3414_buffer_postenable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	.predisable = tcs3414_buffer_predisable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static int tcs3414_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 			   const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	struct tcs3414_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (indio_dev == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	indio_dev->info = &tcs3414_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	indio_dev->name = TCS3414_DRV_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	indio_dev->channels = tcs3414_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	indio_dev->num_channels = ARRAY_SIZE(tcs3414_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	ret = i2c_smbus_read_byte_data(data->client, TCS3414_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	switch (ret & 0xf0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	case 0x00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		dev_info(&client->dev, "TCS3404 found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	case 0x10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		dev_info(&client->dev, "TCS3413/14/15/16 found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	data->control = TCS3414_CONTROL_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	ret = i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		data->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	data->timing = TCS3414_INTEG_12MS; /* free running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	ret = i2c_smbus_write_byte_data(data->client, TCS3414_TIMING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		data->timing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	ret = i2c_smbus_read_byte_data(data->client, TCS3414_GAIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	data->gain = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		tcs3414_trigger_handler, &tcs3414_buffer_setup_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		goto buffer_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) buffer_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static int tcs3414_powerdown(struct tcs3414_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		data->control & ~(TCS3414_CONTROL_POWER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		TCS3414_CONTROL_ADC_EN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static int tcs3414_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	tcs3414_powerdown(iio_priv(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int tcs3414_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	struct tcs3414_data *data = iio_priv(i2c_get_clientdata(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	return tcs3414_powerdown(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static int tcs3414_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	struct tcs3414_data *data = iio_priv(i2c_get_clientdata(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		data->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static SIMPLE_DEV_PM_OPS(tcs3414_pm_ops, tcs3414_suspend, tcs3414_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static const struct i2c_device_id tcs3414_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	{ "tcs3414", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) MODULE_DEVICE_TABLE(i2c, tcs3414_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static struct i2c_driver tcs3414_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		.name	= TCS3414_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		.pm	= &tcs3414_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	.probe		= tcs3414_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	.remove		= tcs3414_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	.id_table	= tcs3414_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) module_i2c_driver(tcs3414_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) MODULE_DESCRIPTION("TCS3414 digital color sensors driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) MODULE_LICENSE("GPL");