Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Support for ON Semiconductor NOA1305 ambient light sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2016 Emcraft Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2019 Collabora Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define NOA1305_REG_POWER_CONTROL	0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define   NOA1305_POWER_CONTROL_DOWN	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define   NOA1305_POWER_CONTROL_ON	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define NOA1305_REG_RESET		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define   NOA1305_RESET_RESET		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define NOA1305_REG_INTEGRATION_TIME	0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define   NOA1305_INTEGR_TIME_800MS	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define   NOA1305_INTEGR_TIME_400MS	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define   NOA1305_INTEGR_TIME_200MS	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define   NOA1305_INTEGR_TIME_100MS	0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define   NOA1305_INTEGR_TIME_50MS	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define   NOA1305_INTEGR_TIME_25MS	0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define   NOA1305_INTEGR_TIME_12_5MS	0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define   NOA1305_INTEGR_TIME_6_25MS	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define NOA1305_REG_INT_SELECT		0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define   NOA1305_INT_SEL_ACTIVE_HIGH	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define   NOA1305_INT_SEL_ACTIVE_LOW	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define   NOA1305_INT_SEL_INACTIVE	0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define NOA1305_REG_INT_THRESH_LSB	0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define NOA1305_REG_INT_THRESH_MSB	0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define NOA1305_REG_ALS_DATA_LSB	0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define NOA1305_REG_ALS_DATA_MSB	0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define NOA1305_REG_DEVICE_ID_LSB	0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define NOA1305_REG_DEVICE_ID_MSB	0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define NOA1305_DEVICE_ID	0x0519
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define NOA1305_DRIVER_NAME	"noa1305"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) struct noa1305_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct regulator *vin_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static int noa1305_measure(struct noa1305_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	__le16 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	ret = regmap_bulk_read(priv->regmap, NOA1305_REG_ALS_DATA_LSB, &data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			       2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	return le16_to_cpu(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static int noa1305_scale(struct noa1305_priv *priv, int *val, int *val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	ret = regmap_read(priv->regmap, NOA1305_REG_INTEGRATION_TIME, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	 * Lux = count / (<Integration Constant> * <Integration Time>)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	 * Integration Constant = 7.7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	 * Integration Time in Seconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	switch (data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	case NOA1305_INTEGR_TIME_800MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		*val = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		*val2 = 77 * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	case NOA1305_INTEGR_TIME_400MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		*val = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		*val2 = 77 * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	case NOA1305_INTEGR_TIME_200MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		*val = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		*val2 = 77 * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	case NOA1305_INTEGR_TIME_100MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		*val = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		*val2 = 77;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	case NOA1305_INTEGR_TIME_50MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		*val = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		*val2 = 77 * 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	case NOA1305_INTEGR_TIME_25MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		*val = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		*val2 = 77 * 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	case NOA1305_INTEGR_TIME_12_5MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		*val = 100000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		*val2 = 77 * 125;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	case NOA1305_INTEGR_TIME_6_25MS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		*val = 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		*val2 = 77 * 625;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct iio_chan_spec noa1305_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		.type = IIO_LIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int noa1305_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 				struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 				int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	int ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	struct noa1305_priv *priv = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			ret = noa1305_measure(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			*val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			return noa1305_scale(priv, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct iio_info noa1305_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.read_raw = noa1305_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static bool noa1305_writable_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	case NOA1305_REG_POWER_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	case NOA1305_REG_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	case NOA1305_REG_INTEGRATION_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	case NOA1305_REG_INT_SELECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	case NOA1305_REG_INT_THRESH_LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	case NOA1305_REG_INT_THRESH_MSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const struct regmap_config noa1305_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.name = NOA1305_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	.max_register = NOA1305_REG_DEVICE_ID_MSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.writeable_reg = noa1305_writable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static void noa1305_reg_remove(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	struct noa1305_priv *priv = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	regulator_disable(priv->vin_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int noa1305_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	struct noa1305_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	__le16 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	unsigned int dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*priv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	regmap = devm_regmap_init_i2c(client, &noa1305_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		dev_err(&client->dev, "Regmap initialization failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	priv = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	priv->vin_reg = devm_regulator_get(&client->dev, "vin");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (IS_ERR(priv->vin_reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		dev_err(&client->dev, "get regulator vin failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		return PTR_ERR(priv->vin_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ret = regulator_enable(priv->vin_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		dev_err(&client->dev, "enable regulator vin failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	ret = devm_add_action_or_reset(&client->dev, noa1305_reg_remove, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		dev_err(&client->dev, "addition of devm action failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	priv->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	priv->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	ret = regmap_bulk_read(regmap, NOA1305_REG_DEVICE_ID_LSB, &data, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		dev_err(&client->dev, "ID reading failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	dev_id = le16_to_cpu(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	if (dev_id != NOA1305_DEVICE_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		dev_err(&client->dev, "Unknown device ID: 0x%x\n", dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	ret = regmap_write(regmap, NOA1305_REG_POWER_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			   NOA1305_POWER_CONTROL_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		dev_err(&client->dev, "Enabling power control failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	ret = regmap_write(regmap, NOA1305_REG_RESET, NOA1305_RESET_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		dev_err(&client->dev, "Device reset failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	ret = regmap_write(regmap, NOA1305_REG_INTEGRATION_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			   NOA1305_INTEGR_TIME_800MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		dev_err(&client->dev, "Setting integration time failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	indio_dev->info = &noa1305_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	indio_dev->channels = noa1305_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	indio_dev->num_channels = ARRAY_SIZE(noa1305_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	indio_dev->name = NOA1305_DRIVER_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	ret = devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		dev_err(&client->dev, "registering device failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const struct of_device_id noa1305_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	{ .compatible = "onnn,noa1305" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) MODULE_DEVICE_TABLE(of, noa1305_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static const struct i2c_device_id noa1305_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	{ "noa1305", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) MODULE_DEVICE_TABLE(i2c, noa1305_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static struct i2c_driver noa1305_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		.name		= NOA1305_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		.of_match_table	= noa1305_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.probe		= noa1305_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	.id_table	= noa1305_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) module_i2c_driver(noa1305_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MODULE_AUTHOR("Sergei Miroshnichenko <sergeimir@emcraft.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MODULE_AUTHOR("Martyn Welch <martyn.welch@collabora.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MODULE_DESCRIPTION("ON Semiconductor NOA1305 ambient light sensor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MODULE_LICENSE("GPL");