^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * lm3533-als.c -- LM3533 Ambient Light Sensor driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2011-2012 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Johan Hovold <jhovold@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/iio/events.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mfd/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/mfd/lm3533.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LM3533_ALS_RESISTOR_MIN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LM3533_ALS_RESISTOR_MAX 127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LM3533_ALS_CHANNEL_CURRENT_MAX 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LM3533_ALS_THRESH_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LM3533_ALS_ZONE_MAX 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LM3533_REG_ALS_RESISTOR_SELECT 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LM3533_REG_ALS_CONF 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LM3533_REG_ALS_ZONE_INFO 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LM3533_REG_ALS_READ_ADC_RAW 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LM3533_REG_ALS_READ_ADC_AVERAGE 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LM3533_REG_ALS_BOUNDARY_BASE 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LM3533_REG_ALS_TARGET_BASE 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define LM3533_ALS_ENABLE_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define LM3533_ALS_INPUT_MODE_MASK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LM3533_ALS_INT_ENABLE_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LM3533_ALS_ZONE_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LM3533_ALS_ZONE_MASK 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LM3533_ALS_FLAG_INT_ENABLED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct lm3533_als {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct lm3533 *lm3533;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) atomic_t zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct mutex thresh_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int lm3533_als_get_adc(struct iio_dev *indio_dev, bool average,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int *adc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (average)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) reg = LM3533_REG_ALS_READ_ADC_AVERAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) reg = LM3533_REG_ALS_READ_ADC_RAW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = lm3533_read(als->lm3533, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) dev_err(&indio_dev->dev, "failed to read adc\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) *adc = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int _lm3533_als_get_zone(struct iio_dev *indio_dev, u8 *zone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ret = lm3533_read(als->lm3533, LM3533_REG_ALS_ZONE_INFO, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) dev_err(&indio_dev->dev, "failed to read zone\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) val = (val & LM3533_ALS_ZONE_MASK) >> LM3533_ALS_ZONE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *zone = min_t(u8, val, LM3533_ALS_ZONE_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int lm3533_als_get_zone(struct iio_dev *indio_dev, u8 *zone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (test_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *zone = atomic_read(&als->zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ret = _lm3533_als_get_zone(indio_dev, zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * channel output channel 0..2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * zone zone 0..4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static inline u8 lm3533_als_get_target_reg(unsigned channel, unsigned zone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return LM3533_REG_ALS_TARGET_BASE + 5 * channel + zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int lm3533_als_get_target(struct iio_dev *indio_dev, unsigned channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned zone, u8 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (channel > LM3533_ALS_CHANNEL_CURRENT_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (zone > LM3533_ALS_ZONE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) reg = lm3533_als_get_target_reg(channel, zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ret = lm3533_read(als->lm3533, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) dev_err(&indio_dev->dev, "failed to get target current\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int lm3533_als_set_target(struct iio_dev *indio_dev, unsigned channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned zone, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (channel > LM3533_ALS_CHANNEL_CURRENT_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (zone > LM3533_ALS_ZONE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) reg = lm3533_als_get_target_reg(channel, zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ret = lm3533_write(als->lm3533, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dev_err(&indio_dev->dev, "failed to set target current\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int lm3533_als_get_current(struct iio_dev *indio_dev, unsigned channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) u8 zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) u8 target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = lm3533_als_get_zone(indio_dev, &zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ret = lm3533_als_get_target(indio_dev, channel, zone, &target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) *val = target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int lm3533_als_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ret = lm3533_als_get_adc(indio_dev, false, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) case IIO_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ret = lm3533_als_get_current(indio_dev, chan->channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) case IIO_CHAN_INFO_AVERAGE_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ret = lm3533_als_get_adc(indio_dev, true, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define CHANNEL_CURRENT(_channel) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .type = IIO_CURRENT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .channel = _channel, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .indexed = true, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .output = true, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static const struct iio_chan_spec lm3533_als_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .type = IIO_LIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .indexed = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) CHANNEL_CURRENT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) CHANNEL_CURRENT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) CHANNEL_CURRENT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static irqreturn_t lm3533_als_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct iio_dev *indio_dev = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) u8 zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* Clear interrupt by reading the ALS zone register. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ret = _lm3533_als_get_zone(indio_dev, &zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) atomic_set(&als->zone, zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) iio_push_event(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) IIO_UNMOD_EVENT_CODE(IIO_LIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) IIO_EV_DIR_EITHER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) iio_get_time_ns(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static int lm3533_als_set_int_mode(struct iio_dev *indio_dev, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 mask = LM3533_ALS_INT_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) val = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret = lm3533_update(als->lm3533, LM3533_REG_ALS_ZONE_INFO, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) dev_err(&indio_dev->dev, "failed to set int mode %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static int lm3533_als_get_int_mode(struct iio_dev *indio_dev, int *enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u8 mask = LM3533_ALS_INT_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ret = lm3533_read(als->lm3533, LM3533_REG_ALS_ZONE_INFO, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) dev_err(&indio_dev->dev, "failed to get int mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) *enable = !!(val & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static inline u8 lm3533_als_get_threshold_reg(unsigned nr, bool raising)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) u8 offset = !raising;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return LM3533_REG_ALS_BOUNDARY_BASE + 2 * nr + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static int lm3533_als_get_threshold(struct iio_dev *indio_dev, unsigned nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) bool raising, u8 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (nr > LM3533_ALS_THRESH_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) reg = lm3533_als_get_threshold_reg(nr, raising);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ret = lm3533_read(als->lm3533, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) dev_err(&indio_dev->dev, "failed to get threshold\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int lm3533_als_set_threshold(struct iio_dev *indio_dev, unsigned nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) bool raising, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) u8 val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) u8 reg, reg2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (nr > LM3533_ALS_THRESH_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) reg = lm3533_als_get_threshold_reg(nr, raising);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) reg2 = lm3533_als_get_threshold_reg(nr, !raising);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) mutex_lock(&als->thresh_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) ret = lm3533_read(als->lm3533, reg2, &val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) dev_err(&indio_dev->dev, "failed to get threshold\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) * This device does not allow negative hysteresis (in fact, it uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * whichever value is smaller as the lower bound) so we need to make
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * sure that thresh_falling <= thresh_raising.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if ((raising && (val < val2)) || (!raising && (val > val2))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ret = lm3533_write(als->lm3533, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) dev_err(&indio_dev->dev, "failed to set threshold\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) mutex_unlock(&als->thresh_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static int lm3533_als_get_hysteresis(struct iio_dev *indio_dev, unsigned nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u8 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) u8 falling;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) u8 raising;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (nr > LM3533_ALS_THRESH_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) mutex_lock(&als->thresh_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ret = lm3533_als_get_threshold(indio_dev, nr, false, &falling);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) ret = lm3533_als_get_threshold(indio_dev, nr, true, &raising);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) *val = raising - falling;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) mutex_unlock(&als->thresh_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static ssize_t show_thresh_either_en(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) int enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) if (als->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) ret = lm3533_als_get_int_mode(indio_dev, &enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) enable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return scnprintf(buf, PAGE_SIZE, "%u\n", enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static ssize_t store_thresh_either_en(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) unsigned long enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) bool int_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) u8 zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (!als->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (kstrtoul(buf, 0, &enable))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int_enabled = test_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (enable && !int_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) ret = lm3533_als_get_zone(indio_dev, &zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) atomic_set(&als->zone, zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) set_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) ret = lm3533_als_set_int_mode(indio_dev, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (!int_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) clear_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (!enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) clear_bit(LM3533_ALS_FLAG_INT_ENABLED, &als->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static ssize_t show_zone(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) u8 zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) ret = lm3533_als_get_zone(indio_dev, &zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return scnprintf(buf, PAGE_SIZE, "%u\n", zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) enum lm3533_als_attribute_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) LM3533_ATTR_TYPE_HYSTERESIS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) LM3533_ATTR_TYPE_TARGET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) LM3533_ATTR_TYPE_THRESH_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) LM3533_ATTR_TYPE_THRESH_RAISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) struct lm3533_als_attribute {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct device_attribute dev_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) enum lm3533_als_attribute_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u8 val1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) u8 val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static inline struct lm3533_als_attribute *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) to_lm3533_als_attr(struct device_attribute *attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return container_of(attr, struct lm3533_als_attribute, dev_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static ssize_t show_als_attr(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct lm3533_als_attribute *als_attr = to_lm3533_als_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) switch (als_attr->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) case LM3533_ATTR_TYPE_HYSTERESIS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ret = lm3533_als_get_hysteresis(indio_dev, als_attr->val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) case LM3533_ATTR_TYPE_TARGET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) ret = lm3533_als_get_target(indio_dev, als_attr->val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) als_attr->val2, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) case LM3533_ATTR_TYPE_THRESH_FALLING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ret = lm3533_als_get_threshold(indio_dev, als_attr->val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) false, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) case LM3533_ATTR_TYPE_THRESH_RAISING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ret = lm3533_als_get_threshold(indio_dev, als_attr->val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) true, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return scnprintf(buf, PAGE_SIZE, "%u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static ssize_t store_als_attr(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct lm3533_als_attribute *als_attr = to_lm3533_als_attr(attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (kstrtou8(buf, 0, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) switch (als_attr->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) case LM3533_ATTR_TYPE_TARGET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) ret = lm3533_als_set_target(indio_dev, als_attr->val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) als_attr->val2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) case LM3533_ATTR_TYPE_THRESH_FALLING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ret = lm3533_als_set_threshold(indio_dev, als_attr->val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) false, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) case LM3533_ATTR_TYPE_THRESH_RAISING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ret = lm3533_als_set_threshold(indio_dev, als_attr->val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) true, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) #define ALS_ATTR(_name, _mode, _show, _store, _type, _val1, _val2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) { .dev_attr = __ATTR(_name, _mode, _show, _store), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .type = _type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .val1 = _val1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .val2 = _val2 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #define LM3533_ALS_ATTR(_name, _mode, _show, _store, _type, _val1, _val2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) struct lm3533_als_attribute lm3533_als_attr_##_name = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) ALS_ATTR(_name, _mode, _show, _store, _type, _val1, _val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) #define ALS_TARGET_ATTR_RW(_channel, _zone) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) LM3533_ALS_ATTR(out_current##_channel##_current##_zone##_raw, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) S_IRUGO | S_IWUSR, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) show_als_attr, store_als_attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) LM3533_ATTR_TYPE_TARGET, _channel, _zone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * ALS output current values (ALS mapper targets)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * out_current[0-2]_current[0-4]_raw 0-255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static ALS_TARGET_ATTR_RW(0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static ALS_TARGET_ATTR_RW(0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static ALS_TARGET_ATTR_RW(0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static ALS_TARGET_ATTR_RW(0, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static ALS_TARGET_ATTR_RW(0, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) static ALS_TARGET_ATTR_RW(1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static ALS_TARGET_ATTR_RW(1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static ALS_TARGET_ATTR_RW(1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) static ALS_TARGET_ATTR_RW(1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static ALS_TARGET_ATTR_RW(1, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) static ALS_TARGET_ATTR_RW(2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static ALS_TARGET_ATTR_RW(2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static ALS_TARGET_ATTR_RW(2, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static ALS_TARGET_ATTR_RW(2, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) static ALS_TARGET_ATTR_RW(2, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) #define ALS_THRESH_FALLING_ATTR_RW(_nr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_falling_value, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) S_IRUGO | S_IWUSR, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) show_als_attr, store_als_attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) LM3533_ATTR_TYPE_THRESH_FALLING, _nr, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) #define ALS_THRESH_RAISING_ATTR_RW(_nr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_raising_value, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) S_IRUGO | S_IWUSR, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) show_als_attr, store_als_attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) LM3533_ATTR_TYPE_THRESH_RAISING, _nr, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * ALS Zone thresholds (boundaries)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * in_illuminance0_thresh[0-3]_falling_value 0-255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * in_illuminance0_thresh[0-3]_raising_value 0-255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) static ALS_THRESH_FALLING_ATTR_RW(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static ALS_THRESH_FALLING_ATTR_RW(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static ALS_THRESH_FALLING_ATTR_RW(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static ALS_THRESH_FALLING_ATTR_RW(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static ALS_THRESH_RAISING_ATTR_RW(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static ALS_THRESH_RAISING_ATTR_RW(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static ALS_THRESH_RAISING_ATTR_RW(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static ALS_THRESH_RAISING_ATTR_RW(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) #define ALS_HYSTERESIS_ATTR_RO(_nr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_hysteresis, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) S_IRUGO, show_als_attr, NULL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) LM3533_ATTR_TYPE_HYSTERESIS, _nr, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) * ALS Zone threshold hysteresis
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) * threshY_hysteresis = threshY_raising - threshY_falling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) * in_illuminance0_thresh[0-3]_hysteresis 0-255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) * in_illuminance0_thresh[0-3]_hysteresis 0-255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static ALS_HYSTERESIS_ATTR_RO(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static ALS_HYSTERESIS_ATTR_RO(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) static ALS_HYSTERESIS_ATTR_RO(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static ALS_HYSTERESIS_ATTR_RO(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) #define ILLUMINANCE_ATTR_RO(_name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) DEVICE_ATTR(in_illuminance0_##_name, S_IRUGO, show_##_name, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) #define ILLUMINANCE_ATTR_RW(_name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) DEVICE_ATTR(in_illuminance0_##_name, S_IRUGO | S_IWUSR, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) show_##_name, store_##_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * ALS Zone threshold-event enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * in_illuminance0_thresh_either_en 0,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static ILLUMINANCE_ATTR_RW(thresh_either_en);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) * ALS Current Zone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * in_illuminance0_zone 0-4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static ILLUMINANCE_ATTR_RO(zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static struct attribute *lm3533_als_event_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) &dev_attr_in_illuminance0_thresh_either_en.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) &lm3533_als_attr_in_illuminance0_thresh0_falling_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) &lm3533_als_attr_in_illuminance0_thresh0_hysteresis.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) &lm3533_als_attr_in_illuminance0_thresh0_raising_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) &lm3533_als_attr_in_illuminance0_thresh1_falling_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) &lm3533_als_attr_in_illuminance0_thresh1_hysteresis.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) &lm3533_als_attr_in_illuminance0_thresh1_raising_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) &lm3533_als_attr_in_illuminance0_thresh2_falling_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) &lm3533_als_attr_in_illuminance0_thresh2_hysteresis.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) &lm3533_als_attr_in_illuminance0_thresh2_raising_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) &lm3533_als_attr_in_illuminance0_thresh3_falling_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) &lm3533_als_attr_in_illuminance0_thresh3_hysteresis.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) &lm3533_als_attr_in_illuminance0_thresh3_raising_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) static const struct attribute_group lm3533_als_event_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .attrs = lm3533_als_event_attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static struct attribute *lm3533_als_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) &dev_attr_in_illuminance0_zone.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) &lm3533_als_attr_out_current0_current0_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) &lm3533_als_attr_out_current0_current1_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) &lm3533_als_attr_out_current0_current2_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) &lm3533_als_attr_out_current0_current3_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) &lm3533_als_attr_out_current0_current4_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) &lm3533_als_attr_out_current1_current0_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) &lm3533_als_attr_out_current1_current1_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) &lm3533_als_attr_out_current1_current2_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) &lm3533_als_attr_out_current1_current3_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) &lm3533_als_attr_out_current1_current4_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) &lm3533_als_attr_out_current2_current0_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) &lm3533_als_attr_out_current2_current1_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) &lm3533_als_attr_out_current2_current2_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) &lm3533_als_attr_out_current2_current3_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) &lm3533_als_attr_out_current2_current4_raw.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) static const struct attribute_group lm3533_als_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .attrs = lm3533_als_attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) static int lm3533_als_set_input_mode(struct lm3533_als *als, bool pwm_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) u8 mask = LM3533_ALS_INPUT_MODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (pwm_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) val = mask; /* pwm input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) val = 0; /* analog input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) ret = lm3533_update(als->lm3533, LM3533_REG_ALS_CONF, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) dev_err(&als->pdev->dev, "failed to set input mode %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) pwm_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static int lm3533_als_set_resistor(struct lm3533_als *als, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) if (val < LM3533_ALS_RESISTOR_MIN || val > LM3533_ALS_RESISTOR_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) dev_err(&als->pdev->dev, "invalid resistor value\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) ret = lm3533_write(als->lm3533, LM3533_REG_ALS_RESISTOR_SELECT, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) dev_err(&als->pdev->dev, "failed to set resistor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static int lm3533_als_setup(struct lm3533_als *als,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) struct lm3533_als_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) ret = lm3533_als_set_input_mode(als, pdata->pwm_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /* ALS input is always high impedance in PWM-mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (!pdata->pwm_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) ret = lm3533_als_set_resistor(als, pdata->r_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static int lm3533_als_setup_irq(struct lm3533_als *als, void *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) u8 mask = LM3533_ALS_INT_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) /* Make sure interrupts are disabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) ret = lm3533_update(als->lm3533, LM3533_REG_ALS_ZONE_INFO, 0, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) dev_err(&als->pdev->dev, "failed to disable interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ret = request_threaded_irq(als->irq, NULL, lm3533_als_isr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) IRQF_TRIGGER_LOW | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) dev_name(&als->pdev->dev), dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) dev_err(&als->pdev->dev, "failed to request irq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) als->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static int lm3533_als_enable(struct lm3533_als *als)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) u8 mask = LM3533_ALS_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) ret = lm3533_update(als->lm3533, LM3533_REG_ALS_CONF, mask, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) dev_err(&als->pdev->dev, "failed to enable ALS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) static int lm3533_als_disable(struct lm3533_als *als)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) u8 mask = LM3533_ALS_ENABLE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) ret = lm3533_update(als->lm3533, LM3533_REG_ALS_CONF, 0, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) dev_err(&als->pdev->dev, "failed to disable ALS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) static const struct iio_info lm3533_als_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .attrs = &lm3533_als_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .event_attrs = &lm3533_als_event_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .read_raw = &lm3533_als_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static int lm3533_als_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) struct lm3533 *lm3533;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) struct lm3533_als_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) struct lm3533_als *als;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) lm3533 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) if (!lm3533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) pdata = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) dev_err(&pdev->dev, "no platform data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*als));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) indio_dev->info = &lm3533_als_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) indio_dev->channels = lm3533_als_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) indio_dev->num_channels = ARRAY_SIZE(lm3533_als_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) indio_dev->name = dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) iio_device_set_parent(indio_dev, pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) als->lm3533 = lm3533;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) als->pdev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) als->irq = lm3533->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) atomic_set(&als->zone, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) mutex_init(&als->thresh_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) platform_set_drvdata(pdev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (als->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) ret = lm3533_als_setup_irq(als, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) ret = lm3533_als_setup(als, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) goto err_free_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) ret = lm3533_als_enable(als);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) goto err_free_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) dev_err(&pdev->dev, "failed to register ALS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) goto err_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) err_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) lm3533_als_disable(als);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) err_free_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) if (als->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) free_irq(als->irq, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static int lm3533_als_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) struct iio_dev *indio_dev = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) struct lm3533_als *als = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) lm3533_als_set_int_mode(indio_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) lm3533_als_disable(als);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) if (als->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) free_irq(als->irq, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) static struct platform_driver lm3533_als_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) .name = "lm3533-als",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) .probe = lm3533_als_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .remove = lm3533_als_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) module_platform_driver(lm3533_als_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) MODULE_AUTHOR("Johan Hovold <jhovold@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) MODULE_DESCRIPTION("LM3533 Ambient Light Sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) MODULE_ALIAS("platform:lm3533-als");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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