Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * IIO driver for the light sensor ISL29028.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * ISL29028 is Concurrent Ambient Light and Proximity Sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (c) 2016-2017 Brian Masney <masneyb@onstation.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Datasheets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *  - http://www.intersil.com/content/dam/Intersil/documents/isl2/isl29028.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *  - http://www.intersil.com/content/dam/Intersil/documents/isl2/isl29030.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ISL29028_CONV_TIME_MS			100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ISL29028_REG_CONFIGURE			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ISL29028_CONF_ALS_IR_MODE_ALS		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define ISL29028_CONF_ALS_IR_MODE_IR		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define ISL29028_CONF_ALS_IR_MODE_MASK		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ISL29028_CONF_ALS_RANGE_LOW_LUX		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define ISL29028_CONF_ALS_RANGE_HIGH_LUX	BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ISL29028_CONF_ALS_RANGE_MASK		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define ISL29028_CONF_ALS_DIS			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define ISL29028_CONF_ALS_EN			BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define ISL29028_CONF_ALS_EN_MASK		BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define ISL29028_CONF_PROX_SLP_SH		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define ISL29028_CONF_PROX_SLP_MASK		(7 << ISL29028_CONF_PROX_SLP_SH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define ISL29028_CONF_PROX_EN			BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define ISL29028_CONF_PROX_EN_MASK		BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define ISL29028_REG_INTERRUPT			0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ISL29028_REG_PROX_DATA			0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ISL29028_REG_ALSIR_L			0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define ISL29028_REG_ALSIR_U			0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define ISL29028_REG_TEST1_MODE			0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define ISL29028_REG_TEST2_MODE			0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define ISL29028_NUM_REGS			(ISL29028_REG_TEST2_MODE + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define ISL29028_POWER_OFF_DELAY_MS		2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) struct isl29028_prox_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	int sampling_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	int sampling_fract;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	int sleep_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static const struct isl29028_prox_data isl29028_prox_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	{   1, 250000, 800 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	{   2, 500000, 400 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	{   5,      0, 200 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	{  10,      0, 100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	{  13, 300000,  75 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	{  20,      0,  50 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	{  80,      0,  13 }, /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			       * Note: Data sheet lists 12.5 ms sleep time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			       * Round up a half millisecond for msleep().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	{ 100,  0,   0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) enum isl29028_als_ir_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	ISL29028_MODE_NONE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	ISL29028_MODE_ALS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	ISL29028_MODE_IR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) struct isl29028_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	struct mutex			lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct regmap			*regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int				prox_sampling_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	int				prox_sampling_frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	bool				enable_prox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int				lux_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	enum isl29028_als_ir_mode	als_ir_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static int isl29028_find_prox_sleep_index(int sampling_int, int sampling_fract)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	for (i = 0; i < ARRAY_SIZE(isl29028_prox_data); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		if (isl29028_prox_data[i].sampling_int == sampling_int &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		    isl29028_prox_data[i].sampling_fract == sampling_fract)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int isl29028_set_proxim_sampling(struct isl29028_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 					int sampling_int, int sampling_fract)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	int sleep_index, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	sleep_index = isl29028_find_prox_sleep_index(sampling_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 						     sampling_fract);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (sleep_index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return sleep_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 				 ISL29028_CONF_PROX_SLP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 				 sleep_index << ISL29028_CONF_PROX_SLP_SH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		dev_err(dev, "%s(): Error %d setting the proximity sampling\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	chip->prox_sampling_int = sampling_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	chip->prox_sampling_frac = sampling_fract;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int isl29028_enable_proximity(struct isl29028_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	int prox_index, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	ret = isl29028_set_proxim_sampling(chip, chip->prox_sampling_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 					   chip->prox_sampling_frac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 				 ISL29028_CONF_PROX_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 				 ISL29028_CONF_PROX_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	/* Wait for conversion to be complete for first sample */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	prox_index = isl29028_find_prox_sleep_index(chip->prox_sampling_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 						    chip->prox_sampling_frac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (prox_index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return prox_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	msleep(isl29028_prox_data[prox_index].sleep_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int isl29028_set_als_scale(struct isl29028_chip *chip, int lux_scale)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	int val = (lux_scale == 2000) ? ISL29028_CONF_ALS_RANGE_HIGH_LUX :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 					ISL29028_CONF_ALS_RANGE_LOW_LUX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 				 ISL29028_CONF_ALS_RANGE_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		dev_err(dev, "%s(): Error %d setting the ALS scale\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	chip->lux_scale = lux_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int isl29028_set_als_ir_mode(struct isl29028_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 				    enum isl29028_als_ir_mode mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (chip->als_ir_mode == mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	ret = isl29028_set_als_scale(chip, chip->lux_scale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	case ISL29028_MODE_ALS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 					 ISL29028_CONF_ALS_IR_MODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 					 ISL29028_CONF_ALS_IR_MODE_ALS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 					 ISL29028_CONF_ALS_RANGE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 					 ISL29028_CONF_ALS_RANGE_HIGH_LUX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	case ISL29028_MODE_IR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 					 ISL29028_CONF_ALS_IR_MODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 					 ISL29028_CONF_ALS_IR_MODE_IR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	case ISL29028_MODE_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		return regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 					  ISL29028_CONF_ALS_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 					  ISL29028_CONF_ALS_DIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	/* Enable the ALS/IR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	ret = regmap_update_bits(chip->regmap, ISL29028_REG_CONFIGURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 				 ISL29028_CONF_ALS_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 				 ISL29028_CONF_ALS_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	/* Need to wait for conversion time if ALS/IR mode enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	msleep(ISL29028_CONV_TIME_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	chip->als_ir_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static int isl29028_read_als_ir(struct isl29028_chip *chip, int *als_ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	unsigned int lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	unsigned int msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_L, &lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			"%s(): Error %d reading register ALSIR_L\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	ret = regmap_read(chip->regmap, ISL29028_REG_ALSIR_U, &msb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			"%s(): Error %d reading register ALSIR_U\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	*als_ir = ((msb & 0xF) << 8) | (lsb & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int isl29028_read_proxim(struct isl29028_chip *chip, int *prox)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	unsigned int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	if (!chip->enable_prox) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		ret = isl29028_enable_proximity(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		chip->enable_prox = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	ret = regmap_read(chip->regmap, ISL29028_REG_PROX_DATA, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		dev_err(dev, "%s(): Error %d reading register PROX_DATA\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	*prox = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static int isl29028_als_get(struct isl29028_chip *chip, int *als_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	int als_ir_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	ret = isl29028_set_als_ir_mode(chip, ISL29028_MODE_ALS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		dev_err(dev, "%s(): Error %d enabling ALS mode\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	ret = isl29028_read_als_ir(chip, &als_ir_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	 * convert als data count to lux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	 * if lux_scale = 125,  lux = count * 0.031
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	 * if lux_scale = 2000, lux = count * 0.49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	if (chip->lux_scale == 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		als_ir_data = (als_ir_data * 31) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		als_ir_data = (als_ir_data * 49) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	*als_data = als_ir_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static int isl29028_ir_get(struct isl29028_chip *chip, int *ir_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	ret = isl29028_set_als_ir_mode(chip, ISL29028_MODE_IR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		dev_err(dev, "%s(): Error %d enabling IR mode\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	return isl29028_read_als_ir(chip, ir_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int isl29028_set_pm_runtime_busy(struct isl29028_chip *chip, bool on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		ret = pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 			pm_runtime_put_noidle(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		pm_runtime_mark_last_busy(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		ret = pm_runtime_put_autosuspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* Channel IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int isl29028_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 			      struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			      int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	struct isl29028_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	ret = isl29028_set_pm_runtime_busy(chip, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	case IIO_PROXIMITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 		if (mask != IIO_CHAN_INFO_SAMP_FREQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 				"%s(): proximity: Mask value 0x%08lx is not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 				__func__, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		if (val < 1 || val > 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 			dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 				"%s(): proximity: Sampling frequency %d is not in the range [1:100]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 				__func__, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		ret = isl29028_set_proxim_sampling(chip, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		if (mask != IIO_CHAN_INFO_SCALE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 			dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 				"%s(): light: Mask value 0x%08lx is not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 				__func__, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		if (val != 125 && val != 2000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 			dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 				"%s(): light: Lux scale %d is not in the set {125, 2000}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 				__func__, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 		ret = isl29028_set_als_scale(chip, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		dev_err(dev, "%s(): Unsupported channel type %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 			__func__, chan->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	ret = isl29028_set_pm_runtime_busy(chip, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static int isl29028_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 			     struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 			     int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	struct isl29028_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	int ret, pm_ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	ret = isl29028_set_pm_runtime_busy(chip, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	case IIO_CHAN_INFO_PROCESSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 			ret = isl29028_als_get(chip, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		case IIO_INTENSITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 			ret = isl29028_ir_get(chip, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		case IIO_PROXIMITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 			ret = isl29028_read_proxim(chip, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	case IIO_CHAN_INFO_SAMP_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 		if (chan->type != IIO_PROXIMITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 		*val = chip->prox_sampling_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		*val2 = chip->prox_sampling_frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 		ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 		if (chan->type != IIO_LIGHT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		*val = chip->lux_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 		ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		dev_err(dev, "%s(): mask value 0x%08lx is not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 			__func__, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	/**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	 * Preserve the ret variable if the call to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	 * isl29028_set_pm_runtime_busy() is successful so the reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	 * (if applicable) is returned to user space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	pm_ret = isl29028_set_pm_runtime_busy(chip, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	if (pm_ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 		return pm_ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static IIO_CONST_ATTR(in_proximity_sampling_frequency_available,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 				"1.25 2.5 5 10 13.3 20 80 100");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static IIO_CONST_ATTR(in_illuminance_scale_available, "125 2000");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) #define ISL29028_CONST_ATTR(name) (&iio_const_attr_##name.dev_attr.attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static struct attribute *isl29028_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	ISL29028_CONST_ATTR(in_proximity_sampling_frequency_available),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	ISL29028_CONST_ATTR(in_illuminance_scale_available),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static const struct attribute_group isl29108_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	.attrs = isl29028_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static const struct iio_chan_spec isl29028_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 		.type = IIO_LIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 		BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 		.type = IIO_INTENSITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 		.type = IIO_PROXIMITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 		BIT(IIO_CHAN_INFO_SAMP_FREQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) static const struct iio_info isl29028_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	.attrs = &isl29108_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	.read_raw = isl29028_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	.write_raw = isl29028_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static int isl29028_clear_configure_reg(struct isl29028_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	ret = regmap_write(chip->regmap, ISL29028_REG_CONFIGURE, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 		dev_err(dev, "%s(): Error %d clearing the CONFIGURE register\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	chip->als_ir_mode = ISL29028_MODE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	chip->enable_prox = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static bool isl29028_is_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	case ISL29028_REG_INTERRUPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	case ISL29028_REG_PROX_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	case ISL29028_REG_ALSIR_L:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	case ISL29028_REG_ALSIR_U:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static const struct regmap_config isl29028_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	.volatile_reg = isl29028_is_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	.max_register = ISL29028_NUM_REGS - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	.num_reg_defaults_raw = ISL29028_NUM_REGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 	.cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) static int isl29028_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 			  const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 	struct isl29028_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	mutex_init(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	chip->regmap = devm_regmap_init_i2c(client, &isl29028_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	if (IS_ERR(chip->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 		ret = PTR_ERR(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		dev_err(&client->dev, "%s: Error %d initializing regmap\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 	chip->enable_prox  = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 	chip->prox_sampling_int = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	chip->prox_sampling_frac = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 	chip->lux_scale = 2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 	ret = regmap_write(chip->regmap, ISL29028_REG_TEST1_MODE, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 			"%s(): Error %d writing to TEST1_MODE register\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 	ret = regmap_write(chip->regmap, ISL29028_REG_TEST2_MODE, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 			"%s(): Error %d writing to TEST2_MODE register\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 	ret = isl29028_clear_configure_reg(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 	indio_dev->info = &isl29028_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 	indio_dev->channels = isl29028_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 	indio_dev->num_channels = ARRAY_SIZE(isl29028_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 	indio_dev->name = id->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	pm_runtime_enable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 	pm_runtime_set_autosuspend_delay(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 					 ISL29028_POWER_OFF_DELAY_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 	pm_runtime_use_autosuspend(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 	ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 			"%s(): iio registration failed with error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static int isl29028_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 	struct isl29028_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 	pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 	pm_runtime_set_suspended(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 	pm_runtime_put_noidle(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 	return isl29028_clear_configure_reg(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static int __maybe_unused isl29028_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	struct isl29028_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 	mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 	ret = isl29028_clear_configure_reg(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 	mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static int __maybe_unused isl29028_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 	/**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 	 * The specific component (ALS/IR or proximity) will enable itself as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 	 * needed the next time that the user requests a reading. This is done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 	 * above in isl29028_set_als_ir_mode() and isl29028_enable_proximity().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static const struct dev_pm_ops isl29028_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 				pm_runtime_force_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 	SET_RUNTIME_PM_OPS(isl29028_suspend, isl29028_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) static const struct i2c_device_id isl29028_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	{"isl29028", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 	{"isl29030", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) MODULE_DEVICE_TABLE(i2c, isl29028_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static const struct of_device_id isl29028_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 	{ .compatible = "isl,isl29028", }, /* for backward compat., don't use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 	{ .compatible = "isil,isl29028", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 	{ .compatible = "isil,isl29030", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) MODULE_DEVICE_TABLE(of, isl29028_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) static struct i2c_driver isl29028_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 	.driver  = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 		.name = "isl29028",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 		.pm = &isl29028_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 		.of_match_table = isl29028_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 	.probe	 = isl29028_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 	.remove  = isl29028_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 	.id_table = isl29028_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) module_i2c_driver(isl29028_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) MODULE_DESCRIPTION("ISL29028 Ambient Light and Proximity Sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");