^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * A iio driver for the light sensor ISL 29018/29023/29035.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * IIO driver for monitoring ambient light intensity in luxi, proximity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * sensing and infrared sensing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (c) 2010, NVIDIA Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define ISL29018_CONV_TIME_MS 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ISL29018_REG_ADD_COMMAND1 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ISL29018_CMD1_OPMODE_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ISL29018_CMD1_OPMODE_MASK (7 << ISL29018_CMD1_OPMODE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ISL29018_CMD1_OPMODE_POWER_DOWN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ISL29018_CMD1_OPMODE_ALS_ONCE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ISL29018_CMD1_OPMODE_IR_ONCE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define ISL29018_CMD1_OPMODE_PROX_ONCE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ISL29018_REG_ADD_COMMAND2 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define ISL29018_CMD2_RESOLUTION_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define ISL29018_CMD2_RESOLUTION_MASK (0x3 << ISL29018_CMD2_RESOLUTION_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define ISL29018_CMD2_RANGE_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ISL29018_CMD2_RANGE_MASK (0x3 << ISL29018_CMD2_RANGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define ISL29018_CMD2_SCHEME_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define ISL29018_CMD2_SCHEME_MASK (0x1 << ISL29018_CMD2_SCHEME_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ISL29018_REG_ADD_DATA_LSB 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define ISL29018_REG_ADD_DATA_MSB 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define ISL29018_REG_TEST 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ISL29018_TEST_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define ISL29018_TEST_MASK (0xFF << ISL29018_TEST_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ISL29035_REG_DEVICE_ID 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ISL29035_DEVICE_ID_SHIFT 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define ISL29035_DEVICE_ID_MASK (0x7 << ISL29035_DEVICE_ID_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define ISL29035_DEVICE_ID 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define ISL29035_BOUT_SHIFT 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define ISL29035_BOUT_MASK (0x01 << ISL29035_BOUT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) enum isl29018_int_time {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ISL29018_INT_TIME_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ISL29018_INT_TIME_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ISL29018_INT_TIME_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ISL29018_INT_TIME_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static const unsigned int isl29018_int_utimes[3][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {90000, 5630, 351, 21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {90000, 5600, 352, 22},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {105000, 6500, 410, 25},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static const struct isl29018_scale {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) unsigned int scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned int uscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) } isl29018_scales[4][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) { {0, 15258}, {0, 61035}, {0, 244140}, {0, 976562} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { {0, 244140}, {0, 976562}, {3, 906250}, {15, 625000} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { {3, 906250}, {15, 625000}, {62, 500000}, {250, 0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) { {62, 500000}, {250, 0}, {1000, 0}, {4000, 0} }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct isl29018_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned int calibscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned int ucalibscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int int_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct isl29018_scale scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int prox_scheme;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) bool suspended;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct regulator *vcc_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static int isl29018_set_integration_time(struct isl29018_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) unsigned int utime)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned int int_time, new_int_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) for (i = 0; i < ARRAY_SIZE(isl29018_int_utimes[chip->type]); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (utime == isl29018_int_utimes[chip->type][i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) new_int_time = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (i >= ARRAY_SIZE(isl29018_int_utimes[chip->type]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = regmap_update_bits(chip->regmap, ISL29018_REG_ADD_COMMAND2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ISL29018_CMD2_RESOLUTION_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) i << ISL29018_CMD2_RESOLUTION_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Keep the same range when integration time changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int_time = chip->int_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) for (i = 0; i < ARRAY_SIZE(isl29018_scales[int_time]); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (chip->scale.scale == isl29018_scales[int_time][i].scale &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) chip->scale.uscale == isl29018_scales[int_time][i].uscale) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) chip->scale = isl29018_scales[new_int_time][i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) chip->int_time = new_int_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int isl29018_set_scale(struct isl29018_chip *chip, int scale, int uscale)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct isl29018_scale new_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) for (i = 0; i < ARRAY_SIZE(isl29018_scales[chip->int_time]); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (scale == isl29018_scales[chip->int_time][i].scale &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) uscale == isl29018_scales[chip->int_time][i].uscale) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) new_scale = isl29018_scales[chip->int_time][i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (i >= ARRAY_SIZE(isl29018_scales[chip->int_time]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ret = regmap_update_bits(chip->regmap, ISL29018_REG_ADD_COMMAND2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ISL29018_CMD2_RANGE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) i << ISL29018_CMD2_RANGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) chip->scale = new_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static int isl29018_read_sensor_input(struct isl29018_chip *chip, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned int lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned int msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* Set mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) status = regmap_write(chip->regmap, ISL29018_REG_ADD_COMMAND1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) mode << ISL29018_CMD1_OPMODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) "Error in setting operating mode err %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) msleep(ISL29018_CONV_TIME_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) status = regmap_read(chip->regmap, ISL29018_REG_ADD_DATA_LSB, &lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) "Error in reading LSB DATA with err %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) status = regmap_read(chip->regmap, ISL29018_REG_ADD_DATA_MSB, &msb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "Error in reading MSB DATA with error %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) dev_vdbg(dev, "MSB 0x%x and LSB 0x%x\n", msb, lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return (msb << 8) | lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static int isl29018_read_lux(struct isl29018_chip *chip, int *lux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int lux_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) unsigned int data_x_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) lux_data = isl29018_read_sensor_input(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ISL29018_CMD1_OPMODE_ALS_ONCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (lux_data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return lux_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) data_x_range = lux_data * chip->scale.scale +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) lux_data * chip->scale.uscale / 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) *lux = data_x_range * chip->calibscale +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) data_x_range * chip->ucalibscale / 1000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static int isl29018_read_ir(struct isl29018_chip *chip, int *ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int ir_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ir_data = isl29018_read_sensor_input(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ISL29018_CMD1_OPMODE_IR_ONCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (ir_data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return ir_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) *ir = ir_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int isl29018_read_proximity_ir(struct isl29018_chip *chip, int scheme,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int *near_ir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) int prox_data = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) int ir_data = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* Do proximity sensing with required scheme */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) status = regmap_update_bits(chip->regmap, ISL29018_REG_ADD_COMMAND2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ISL29018_CMD2_SCHEME_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) scheme << ISL29018_CMD2_SCHEME_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) dev_err(dev, "Error in setting operating mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) prox_data = isl29018_read_sensor_input(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ISL29018_CMD1_OPMODE_PROX_ONCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (prox_data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return prox_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (scheme == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) *near_ir = prox_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ir_data = isl29018_read_sensor_input(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ISL29018_CMD1_OPMODE_IR_ONCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (ir_data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return ir_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (prox_data >= ir_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) *near_ir = prox_data - ir_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) *near_ir = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static ssize_t in_illuminance_scale_available_show
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) (struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct isl29018_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) for (i = 0; i < ARRAY_SIZE(isl29018_scales[chip->int_time]); ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) len += sprintf(buf + len, "%d.%06d ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) isl29018_scales[chip->int_time][i].scale,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) isl29018_scales[chip->int_time][i].uscale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) buf[len - 1] = '\n';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static ssize_t in_illuminance_integration_time_available_show
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) (struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct isl29018_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) for (i = 0; i < ARRAY_SIZE(isl29018_int_utimes[chip->type]); ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) len += sprintf(buf + len, "0.%06d ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) isl29018_int_utimes[chip->type][i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) buf[len - 1] = '\n';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * From ISL29018 Data Sheet (FN6619.4, Oct 8, 2012) regarding the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * infrared suppression:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * Proximity Sensing Scheme: Bit 7. This bit programs the function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * of the proximity detection. Logic 0 of this bit, Scheme 0, makes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * full n (4, 8, 12, 16) bits (unsigned) proximity detection. The range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * of Scheme 0 proximity count is from 0 to 2^n. Logic 1 of this bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * Scheme 1, makes n-1 (3, 7, 11, 15) bits (2's complementary)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * proximity_less_ambient detection. The range of Scheme 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * proximity count is from -2^(n-1) to 2^(n-1) . The sign bit is extended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * for resolutions less than 16. While Scheme 0 has wider dynamic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * range, Scheme 1 proximity detection is less affected by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * ambient IR noise variation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * 0 Sensing IR from LED and ambient
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * 1 Sensing IR from LED with ambient IR rejection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static ssize_t proximity_on_chip_ambient_infrared_suppression_show
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) (struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct isl29018_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * Return the "proximity scheme" i.e. if the chip does on chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * infrared suppression (1 means perform on chip suppression)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return sprintf(buf, "%d\n", chip->prox_scheme);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static ssize_t proximity_on_chip_ambient_infrared_suppression_store
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) (struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) struct isl29018_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (kstrtoint(buf, 10, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (!(val == 0 || val == 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * Get the "proximity scheme" i.e. if the chip does on chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * infrared suppression (1 means perform on chip suppression)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) chip->prox_scheme = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static int isl29018_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) int val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct isl29018_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) int ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (chip->suspended) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) goto write_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case IIO_CHAN_INFO_CALIBSCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (chan->type == IIO_LIGHT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) chip->calibscale = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) chip->ucalibscale = val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (chan->type == IIO_LIGHT && !val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ret = isl29018_set_integration_time(chip, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (chan->type == IIO_LIGHT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ret = isl29018_set_scale(chip, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) write_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static int isl29018_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) int ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) struct isl29018_chip *chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (chip->suspended) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) goto read_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) case IIO_CHAN_INFO_PROCESSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) case IIO_LIGHT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) ret = isl29018_read_lux(chip, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) case IIO_INTENSITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) ret = isl29018_read_ir(chip, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) case IIO_PROXIMITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ret = isl29018_read_proximity_ir(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) chip->prox_scheme,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case IIO_CHAN_INFO_INT_TIME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (chan->type == IIO_LIGHT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) *val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) *val2 = isl29018_int_utimes[chip->type][chip->int_time];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) ret = IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (chan->type == IIO_LIGHT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) *val = chip->scale.scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) *val2 = chip->scale.uscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ret = IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) case IIO_CHAN_INFO_CALIBSCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (chan->type == IIO_LIGHT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) *val = chip->calibscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) *val2 = chip->ucalibscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) ret = IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) read_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) #define ISL29018_LIGHT_CHANNEL { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .type = IIO_LIGHT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .channel = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) BIT(IIO_CHAN_INFO_CALIBSCALE) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) BIT(IIO_CHAN_INFO_SCALE) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) BIT(IIO_CHAN_INFO_INT_TIME), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #define ISL29018_IR_CHANNEL { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .type = IIO_INTENSITY, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .modified = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .channel2 = IIO_MOD_LIGHT_IR, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #define ISL29018_PROXIMITY_CHANNEL { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .type = IIO_PROXIMITY, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static const struct iio_chan_spec isl29018_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) ISL29018_LIGHT_CHANNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) ISL29018_IR_CHANNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ISL29018_PROXIMITY_CHANNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static const struct iio_chan_spec isl29023_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) ISL29018_LIGHT_CHANNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) ISL29018_IR_CHANNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static IIO_DEVICE_ATTR_RO(in_illuminance_integration_time_available, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static IIO_DEVICE_ATTR_RO(in_illuminance_scale_available, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) static IIO_DEVICE_ATTR_RW(proximity_on_chip_ambient_infrared_suppression, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #define ISL29018_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) static struct attribute *isl29018_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) ISL29018_DEV_ATTR(in_illuminance_scale_available),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ISL29018_DEV_ATTR(in_illuminance_integration_time_available),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ISL29018_DEV_ATTR(proximity_on_chip_ambient_infrared_suppression),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static struct attribute *isl29023_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) ISL29018_DEV_ATTR(in_illuminance_scale_available),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) ISL29018_DEV_ATTR(in_illuminance_integration_time_available),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static const struct attribute_group isl29018_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .attrs = isl29018_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) static const struct attribute_group isl29023_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .attrs = isl29023_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) isl29018,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) isl29023,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) isl29035,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static int isl29018_chip_init(struct isl29018_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) struct device *dev = regmap_get_device(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (chip->type == isl29035) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) status = regmap_read(chip->regmap, ISL29035_REG_DEVICE_ID, &id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) "Error reading ID register with error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) id = (id & ISL29035_DEVICE_ID_MASK) >> ISL29035_DEVICE_ID_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (id != ISL29035_DEVICE_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* Clear brownout bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) status = regmap_update_bits(chip->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ISL29035_REG_DEVICE_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ISL29035_BOUT_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * Code added per Intersil Application Note 1534:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * When VDD sinks to approximately 1.8V or below, some of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * the part's registers may change their state. When VDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * recovers to 2.25V (or greater), the part may thus be in an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * unknown mode of operation. The user can return the part to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * a known mode of operation either by (a) setting VDD = 0V for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * 1 second or more and then powering back up with a slew rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * of 0.5V/ms or greater, or (b) via I2C disable all ALS/PROX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * conversions, clear the test registers, and then rewrite all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * registers to the desired values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * For ISL29011, ISL29018, ISL29021, ISL29023
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * 1. Write 0x00 to register 0x08 (TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * 2. Write 0x00 to register 0x00 (CMD1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * 3. Rewrite all registers to the desired values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * ISL29018 Data Sheet (FN6619.1, Feb 11, 2010) essentially says
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * the same thing EXCEPT the data sheet asks for a 1ms delay after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * writing the CMD1 register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) status = regmap_write(chip->regmap, ISL29018_REG_TEST, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) dev_err(dev, "Failed to clear isl29018 TEST reg.(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * See Intersil AN1534 comments above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * "Operating Mode" (COMMAND1) register is reprogrammed when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * data is read from the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) status = regmap_write(chip->regmap, ISL29018_REG_ADD_COMMAND1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) dev_err(dev, "Failed to clear isl29018 CMD1 reg.(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) usleep_range(1000, 2000); /* per data sheet, page 10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /* Set defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) status = isl29018_set_scale(chip, chip->scale.scale,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) chip->scale.uscale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) dev_err(dev, "Init of isl29018 fails\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) status = isl29018_set_integration_time(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) isl29018_int_utimes[chip->type][chip->int_time]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) dev_err(dev, "Init of isl29018 fails\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static const struct iio_info isl29018_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .attrs = &isl29018_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .read_raw = isl29018_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .write_raw = isl29018_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static const struct iio_info isl29023_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .attrs = &isl29023_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .read_raw = isl29018_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .write_raw = isl29018_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static bool isl29018_is_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) case ISL29018_REG_ADD_DATA_LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) case ISL29018_REG_ADD_DATA_MSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) case ISL29018_REG_ADD_COMMAND1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) case ISL29018_REG_TEST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) case ISL29035_REG_DEVICE_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) static const struct regmap_config isl29018_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .volatile_reg = isl29018_is_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .max_register = ISL29018_REG_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .num_reg_defaults_raw = ISL29018_REG_TEST + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) static const struct regmap_config isl29035_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .volatile_reg = isl29018_is_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .max_register = ISL29035_REG_DEVICE_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .num_reg_defaults_raw = ISL29035_REG_DEVICE_ID + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) struct isl29018_chip_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) const struct iio_chan_spec *channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) int num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) const struct iio_info *indio_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) const struct regmap_config *regmap_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static const struct isl29018_chip_info isl29018_chip_info_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) [isl29018] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .channels = isl29018_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .num_channels = ARRAY_SIZE(isl29018_channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .indio_info = &isl29018_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .regmap_cfg = &isl29018_regmap_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) [isl29023] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .channels = isl29023_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .num_channels = ARRAY_SIZE(isl29023_channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .indio_info = &isl29023_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .regmap_cfg = &isl29018_regmap_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) [isl29035] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .channels = isl29023_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .num_channels = ARRAY_SIZE(isl29023_channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .indio_info = &isl29023_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .regmap_cfg = &isl29035_regmap_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static const char *isl29018_match_acpi_device(struct device *dev, int *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) const struct acpi_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) id = acpi_match_device(dev->driver->acpi_match_table, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (!id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) *data = (int)id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) return dev_name(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) static void isl29018_disable_regulator_action(void *_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct isl29018_chip *chip = _data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) err = regulator_disable(chip->vcc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) pr_err("failed to disable isl29018's VCC regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static int isl29018_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) struct isl29018_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) const char *name = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) int dev_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) chip = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) if (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) name = id->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) dev_id = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) if (ACPI_HANDLE(&client->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) name = isl29018_match_acpi_device(&client->dev, &dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) mutex_init(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) chip->type = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) chip->calibscale = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) chip->ucalibscale = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) chip->int_time = ISL29018_INT_TIME_16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) chip->scale = isl29018_scales[chip->int_time][0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) chip->suspended = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) chip->vcc_reg = devm_regulator_get(&client->dev, "vcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) if (IS_ERR(chip->vcc_reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) return dev_err_probe(&client->dev, PTR_ERR(chip->vcc_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) "failed to get VCC regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) err = regulator_enable(chip->vcc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) dev_err(&client->dev, "failed to enable VCC regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) err = devm_add_action_or_reset(&client->dev, isl29018_disable_regulator_action,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) dev_err(&client->dev, "failed to setup regulator cleanup action!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) chip->regmap = devm_regmap_init_i2c(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) isl29018_chip_info_tbl[dev_id].regmap_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (IS_ERR(chip->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) err = PTR_ERR(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) dev_err(&client->dev, "regmap initialization fails: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) err = isl29018_chip_init(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) indio_dev->info = isl29018_chip_info_tbl[dev_id].indio_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) indio_dev->channels = isl29018_chip_info_tbl[dev_id].channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) indio_dev->num_channels = isl29018_chip_info_tbl[dev_id].num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) indio_dev->name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) return devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) static int isl29018_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct isl29018_chip *chip = iio_priv(dev_get_drvdata(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) * Since this driver uses only polling commands, we are by default in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) * auto shutdown (ie, power-down) mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) * So we do not have much to do here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) chip->suspended = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ret = regulator_disable(chip->vcc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) dev_err(dev, "failed to disable VCC regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) static int isl29018_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) struct isl29018_chip *chip = iio_priv(dev_get_drvdata(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) err = regulator_enable(chip->vcc_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) dev_err(dev, "failed to enable VCC regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) err = isl29018_chip_init(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if (!err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) chip->suspended = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) static SIMPLE_DEV_PM_OPS(isl29018_pm_ops, isl29018_suspend, isl29018_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) #define ISL29018_PM_OPS (&isl29018_pm_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) #define ISL29018_PM_OPS NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) static const struct acpi_device_id isl29018_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) {"ISL29018", isl29018},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) {"ISL29023", isl29023},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) {"ISL29035", isl29035},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) MODULE_DEVICE_TABLE(acpi, isl29018_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static const struct i2c_device_id isl29018_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {"isl29018", isl29018},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {"isl29023", isl29023},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) {"isl29035", isl29035},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) MODULE_DEVICE_TABLE(i2c, isl29018_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) static const struct of_device_id isl29018_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) { .compatible = "isil,isl29018", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) { .compatible = "isil,isl29023", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) { .compatible = "isil,isl29035", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) MODULE_DEVICE_TABLE(of, isl29018_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) static struct i2c_driver isl29018_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .name = "isl29018",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .acpi_match_table = ACPI_PTR(isl29018_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) .pm = ISL29018_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) .of_match_table = isl29018_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .probe = isl29018_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .id_table = isl29018_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) module_i2c_driver(isl29018_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) MODULE_DESCRIPTION("ISL29018 Ambient Light Sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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