Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * AL3320A - Dyna Image Ambient Light Sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2014, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * IIO driver for AL3320A (7-bit I2C slave address 0x1C).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * TODO: interrupt support, thresholds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * When the driver will get support for interrupt handling, then interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * will need to be disabled before turning sensor OFF in order to avoid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * potential races with the interrupt handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define AL3320A_DRV_NAME "al3320a"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define AL3320A_REG_CONFIG		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define AL3320A_REG_STATUS		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define AL3320A_REG_INT			0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define AL3320A_REG_WAIT		0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define AL3320A_REG_CONFIG_RANGE	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define AL3320A_REG_PERSIST		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define AL3320A_REG_MEAN_TIME		0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define AL3320A_REG_ADUMMY		0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define AL3320A_REG_DATA_LOW		0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define AL3320A_REG_LOW_THRESH_LOW	0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define AL3320A_REG_LOW_THRESH_HIGH	0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define AL3320A_REG_HIGH_THRESH_LOW	0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define AL3320A_REG_HIGH_THRESH_HIGH	0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define AL3320A_CONFIG_DISABLE		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define AL3320A_CONFIG_ENABLE		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define AL3320A_GAIN_MASK		GENMASK(2, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /* chip params default values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define AL3320A_DEFAULT_MEAN_TIME	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define AL3320A_DEFAULT_WAIT_TIME	0 /* no waiting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define AL3320A_SCALE_AVAILABLE "0.512 0.128 0.032 0.01"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) enum al3320a_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	AL3320A_RANGE_1, /* 33.28 Klx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	AL3320A_RANGE_2, /* 8.32 Klx  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	AL3320A_RANGE_3, /* 2.08 Klx  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	AL3320A_RANGE_4  /* 0.65 Klx  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static const int al3320a_scales[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	{0, 512000}, {0, 128000}, {0, 32000}, {0, 10000}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) struct al3320a_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static const struct iio_chan_spec al3320a_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		.type	= IIO_LIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 				      BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static IIO_CONST_ATTR(in_illuminance_scale_available, AL3320A_SCALE_AVAILABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static struct attribute *al3320a_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	&iio_const_attr_in_illuminance_scale_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static const struct attribute_group al3320a_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.attrs = al3320a_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static int al3320a_set_pwr(struct i2c_client *client, bool pwr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u8 val = pwr ? AL3320A_CONFIG_ENABLE : AL3320A_CONFIG_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	return i2c_smbus_write_byte_data(client, AL3320A_REG_CONFIG, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static void al3320a_set_pwr_off(void *_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct al3320a_data *data = _data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	al3320a_set_pwr(data->client, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static int al3320a_init(struct al3320a_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	ret = al3320a_set_pwr(data->client, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_CONFIG_RANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 					FIELD_PREP(AL3320A_GAIN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 						   AL3320A_RANGE_3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_MEAN_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 					AL3320A_DEFAULT_MEAN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_WAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 					AL3320A_DEFAULT_WAIT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int al3320a_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			    struct iio_chan_spec const *chan, int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			    int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	struct al3320a_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		 * ALS ADC value is stored in two adjacent registers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		 * - low byte of output is stored at AL3320A_REG_DATA_LOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		 * - high byte of output is stored at AL3320A_REG_DATA_LOW + 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		ret = i2c_smbus_read_word_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 					       AL3320A_REG_DATA_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		*val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		ret = i2c_smbus_read_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 					       AL3320A_REG_CONFIG_RANGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		ret = FIELD_GET(AL3320A_GAIN_MASK, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		*val = al3320a_scales[ret][0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		*val2 = al3320a_scales[ret][1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int al3320a_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			     struct iio_chan_spec const *chan, int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			     int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	struct al3320a_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		for (i = 0; i < ARRAY_SIZE(al3320a_scales); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			if (val != al3320a_scales[i][0] ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			    val2 != al3320a_scales[i][1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			return i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 					AL3320A_REG_CONFIG_RANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 					FIELD_PREP(AL3320A_GAIN_MASK, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const struct iio_info al3320a_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	.read_raw	= al3320a_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	.write_raw	= al3320a_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.attrs		= &al3320a_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int al3320a_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct al3320a_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	indio_dev->info = &al3320a_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	indio_dev->name = AL3320A_DRV_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	indio_dev->channels = al3320a_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	indio_dev->num_channels = ARRAY_SIZE(al3320a_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	ret = al3320a_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		dev_err(&client->dev, "al3320a chip init failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ret = devm_add_action_or_reset(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 					al3320a_set_pwr_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 					data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	return devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int __maybe_unused al3320a_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	return al3320a_set_pwr(to_i2c_client(dev), false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int __maybe_unused al3320a_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	return al3320a_set_pwr(to_i2c_client(dev), true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static SIMPLE_DEV_PM_OPS(al3320a_pm_ops, al3320a_suspend, al3320a_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const struct i2c_device_id al3320a_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	{"al3320a", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_DEVICE_TABLE(i2c, al3320a_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static const struct of_device_id al3320a_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	{ .compatible = "dynaimage,al3320a", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) MODULE_DEVICE_TABLE(of, al3320a_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static struct i2c_driver al3320a_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		.name = AL3320A_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		.of_match_table = al3320a_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		.pm = &al3320a_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	.probe		= al3320a_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	.id_table	= al3320a_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) module_i2c_driver(al3320a_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MODULE_DESCRIPTION("AL3320A Ambient Light Sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MODULE_LICENSE("GPL v2");