^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * KMX61 - Kionix 6-axis Accelerometer/Magnetometer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2014, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * IIO driver for KMX61 (7-bit I2C slave address 0x0E or 0x0F).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/iio/events.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/iio/trigger.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/iio/trigger_consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define KMX61_DRV_NAME "kmx61"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define KMX61_IRQ_NAME "kmx61_event"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define KMX61_REG_WHO_AM_I 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define KMX61_REG_INS1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define KMX61_REG_INS2 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * three 16-bit accelerometer output registers for X/Y/Z axis
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * we use only XOUT_L as a base register, all other addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * can be obtained by applying an offset and are provided here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * only for clarity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define KMX61_ACC_XOUT_L 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define KMX61_ACC_XOUT_H 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define KMX61_ACC_YOUT_L 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define KMX61_ACC_YOUT_H 0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define KMX61_ACC_ZOUT_L 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define KMX61_ACC_ZOUT_H 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * one 16-bit temperature output register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define KMX61_TEMP_L 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define KMX61_TEMP_H 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * three 16-bit magnetometer output registers for X/Y/Z axis
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define KMX61_MAG_XOUT_L 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define KMX61_MAG_XOUT_H 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define KMX61_MAG_YOUT_L 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define KMX61_MAG_YOUT_H 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define KMX61_MAG_ZOUT_L 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define KMX61_MAG_ZOUT_H 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define KMX61_REG_INL 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define KMX61_REG_STBY 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define KMX61_REG_CTRL1 0x2A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define KMX61_REG_CTRL2 0x2B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define KMX61_REG_ODCNTL 0x2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define KMX61_REG_INC1 0x2D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define KMX61_REG_WUF_THRESH 0x3D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define KMX61_REG_WUF_TIMER 0x3E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define KMX61_ACC_STBY_BIT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define KMX61_MAG_STBY_BIT BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define KMX61_ACT_STBY_BIT BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define KMX61_ALL_STBY (KMX61_ACC_STBY_BIT | KMX61_MAG_STBY_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define KMX61_REG_INS1_BIT_WUFS BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define KMX61_REG_INS2_BIT_ZP BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define KMX61_REG_INS2_BIT_ZN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define KMX61_REG_INS2_BIT_YP BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define KMX61_REG_INS2_BIT_YN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define KMX61_REG_INS2_BIT_XP BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define KMX61_REG_INS2_BIT_XN BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define KMX61_REG_CTRL1_GSEL_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define KMX61_REG_CTRL1_BIT_RES BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define KMX61_REG_CTRL1_BIT_DRDYE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define KMX61_REG_CTRL1_BIT_WUFE BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define KMX61_REG_CTRL1_BIT_BTSE BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define KMX61_REG_INC1_BIT_WUFS BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define KMX61_REG_INC1_BIT_DRDYM BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define KMX61_REG_INC1_BIT_DRDYA BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define KMX61_REG_INC1_BIT_IEN BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define KMX61_ACC_ODR_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define KMX61_MAG_ODR_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define KMX61_ACC_ODR_MASK 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define KMX61_MAG_ODR_MASK 0xF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define KMX61_OWUF_MASK 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define KMX61_DEFAULT_WAKE_THRESH 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define KMX61_DEFAULT_WAKE_DURATION 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define KMX61_SLEEP_DELAY_MS 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define KMX61_CHIP_ID 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* KMX61 devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define KMX61_ACC 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define KMX61_MAG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct kmx61_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* serialize access to non-atomic ops, e.g set_mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* standby state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) bool acc_stby;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) bool mag_stby;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* power state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) bool acc_ps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) bool mag_ps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* config bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u8 odr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u8 wake_thresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u8 wake_duration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* accelerometer specific data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct iio_dev *acc_indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct iio_trigger *acc_dready_trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct iio_trigger *motion_trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) bool acc_dready_trig_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) bool motion_trig_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) bool ev_enable_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* magnetometer specific data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct iio_dev *mag_indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct iio_trigger *mag_dready_trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) bool mag_dready_trig_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) enum kmx61_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) KMX61_RANGE_2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) KMX61_RANGE_4G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) KMX61_RANGE_8G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) enum kmx61_axis {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) KMX61_AXIS_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) KMX61_AXIS_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) KMX61_AXIS_Z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static const u16 kmx61_uscale_table[] = {9582, 19163, 38326};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) int val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) } kmx61_samp_freq_table[] = { {12, 500000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {25, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {50, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {100, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {200, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {400, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {800, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {1600, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {0, 781000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {1, 563000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {3, 125000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {6, 250000} };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int odr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) } kmx61_wake_up_odr_table[] = { {0, 781000, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {1, 563000, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {3, 125000, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {6, 250000, 0x03},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {12, 500000, 0x04},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {25, 0, 0x05},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {50, 0, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {100, 0, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {200, 0, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {400, 0, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {800, 0, 0x06},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {1600, 0, 0x06} };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static IIO_CONST_ATTR(accel_scale_available, "0.009582 0.019163 0.038326");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static IIO_CONST_ATTR(magn_scale_available, "0.001465");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static struct attribute *kmx61_acc_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) &iio_const_attr_accel_scale_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) &iio_const_attr_sampling_frequency_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static struct attribute *kmx61_mag_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) &iio_const_attr_magn_scale_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) &iio_const_attr_sampling_frequency_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static const struct attribute_group kmx61_acc_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .attrs = kmx61_acc_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static const struct attribute_group kmx61_mag_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .attrs = kmx61_mag_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static const struct iio_event_spec kmx61_event = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .type = IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .dir = IIO_EV_DIR_EITHER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .mask_separate = BIT(IIO_EV_INFO_VALUE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) BIT(IIO_EV_INFO_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) BIT(IIO_EV_INFO_PERIOD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define KMX61_ACC_CHAN(_axis) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .type = IIO_ACCEL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .modified = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .channel2 = IIO_MOD_ ## _axis, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) BIT(IIO_CHAN_INFO_SAMP_FREQ), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .address = KMX61_ACC, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .scan_index = KMX61_AXIS_ ## _axis, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .sign = 's', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .realbits = 12, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .storagebits = 16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .shift = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .endianness = IIO_LE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .event_spec = &kmx61_event, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .num_event_specs = 1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define KMX61_MAG_CHAN(_axis) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .type = IIO_MAGN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .modified = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .channel2 = IIO_MOD_ ## _axis, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .address = KMX61_MAG, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) BIT(IIO_CHAN_INFO_SAMP_FREQ), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .scan_index = KMX61_AXIS_ ## _axis, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .sign = 's', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .realbits = 14, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .storagebits = 16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .shift = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .endianness = IIO_LE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const struct iio_chan_spec kmx61_acc_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) KMX61_ACC_CHAN(X),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) KMX61_ACC_CHAN(Y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) KMX61_ACC_CHAN(Z),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static const struct iio_chan_spec kmx61_mag_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) KMX61_MAG_CHAN(X),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) KMX61_MAG_CHAN(Y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) KMX61_MAG_CHAN(Z),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static void kmx61_set_data(struct iio_dev *indio_dev, struct kmx61_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct kmx61_data **priv = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) *priv = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static struct kmx61_data *kmx61_get_data(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return *(struct kmx61_data **)iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static int kmx61_convert_freq_to_bit(int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (val == kmx61_samp_freq_table[i].val &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) val2 == kmx61_samp_freq_table[i].val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int kmx61_convert_wake_up_odr_to_bit(int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) for (i = 0; i < ARRAY_SIZE(kmx61_wake_up_odr_table); ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (kmx61_wake_up_odr_table[i].val == val &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) kmx61_wake_up_odr_table[i].val2 == val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return kmx61_wake_up_odr_table[i].odr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * kmx61_set_mode() - set KMX61 device operating mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * @data: kmx61 device private data pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * @mode: bitmask, indicating operating mode for @device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * @device: bitmask, indicating device for which @mode needs to be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * @update: update stby bits stored in device's private @data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * For each sensor (accelerometer/magnetometer) there are two operating modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * STANDBY and OPERATION. Neither accel nor magn can be disabled independently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * if they are both enabled. Internal sensors state is saved in acc_stby and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * mag_stby members of driver's private @data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int kmx61_set_mode(struct kmx61_data *data, u8 mode, u8 device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) bool update)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) int acc_stby = -1, mag_stby = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) dev_err(&data->client->dev, "Error reading reg_stby\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (device & KMX61_ACC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (mode & KMX61_ACC_STBY_BIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) ret |= KMX61_ACC_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) acc_stby = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ret &= ~KMX61_ACC_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) acc_stby = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (device & KMX61_MAG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (mode & KMX61_MAG_STBY_BIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) ret |= KMX61_MAG_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) mag_stby = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) ret &= ~KMX61_MAG_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) mag_stby = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (mode & KMX61_ACT_STBY_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ret |= KMX61_ACT_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_STBY, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) dev_err(&data->client->dev, "Error writing reg_stby\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (acc_stby != -1 && update)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) data->acc_stby = acc_stby;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (mag_stby != -1 && update)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) data->mag_stby = mag_stby;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static int kmx61_get_mode(struct kmx61_data *data, u8 *mode, u8 device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) dev_err(&data->client->dev, "Error reading reg_stby\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) *mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (device & KMX61_ACC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (ret & KMX61_ACC_STBY_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) *mode |= KMX61_ACC_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) *mode &= ~KMX61_ACC_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (device & KMX61_MAG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) if (ret & KMX61_MAG_STBY_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) *mode |= KMX61_MAG_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) *mode &= ~KMX61_MAG_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static int kmx61_set_wake_up_odr(struct kmx61_data *data, int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) int ret, odr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) odr_bits = kmx61_convert_wake_up_odr_to_bit(val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (odr_bits < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return odr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) odr_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static int kmx61_set_odr(struct kmx61_data *data, int val, int val2, u8 device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) int lodr_bits, odr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) lodr_bits = kmx61_convert_freq_to_bit(val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (lodr_bits < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return lodr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /* To change ODR, accel and magn must be in STDBY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) odr_bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (device & KMX61_ACC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) odr_bits |= lodr_bits << KMX61_ACC_ODR_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (device & KMX61_MAG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) odr_bits |= lodr_bits << KMX61_MAG_ODR_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_ODCNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) odr_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) data->odr_bits = odr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (device & KMX61_ACC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ret = kmx61_set_wake_up_odr(data, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static int kmx61_get_odr(struct kmx61_data *data, int *val, int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) u8 device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) u8 lodr_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (device & KMX61_ACC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) lodr_bits = (data->odr_bits >> KMX61_ACC_ODR_SHIFT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) KMX61_ACC_ODR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) else if (device & KMX61_MAG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) lodr_bits = (data->odr_bits >> KMX61_MAG_ODR_SHIFT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) KMX61_MAG_ODR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (lodr_bits >= ARRAY_SIZE(kmx61_samp_freq_table))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) *val = kmx61_samp_freq_table[lodr_bits].val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) *val2 = kmx61_samp_freq_table[lodr_bits].val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static int kmx61_set_range(struct kmx61_data *data, u8 range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) ret &= ~KMX61_REG_CTRL1_GSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ret |= range & KMX61_REG_CTRL1_GSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) data->range = range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) static int kmx61_set_scale(struct kmx61_data *data, u16 uscale)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) for (i = 0; i < ARRAY_SIZE(kmx61_uscale_table); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (kmx61_uscale_table[i] == uscale) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) ret = kmx61_get_mode(data, &mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) KMX61_ACC | KMX61_MAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) ret = kmx61_set_mode(data, KMX61_ALL_STBY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ret = kmx61_set_range(data, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return kmx61_set_mode(data, mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static int kmx61_chip_init(struct kmx61_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) int ret, val, val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_WHO_AM_I);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) dev_err(&data->client->dev, "Error reading who_am_i\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (ret != KMX61_CHIP_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) "Wrong chip id, got %x expected %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) ret, KMX61_CHIP_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) /* set accel 12bit, 4g range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) ret = kmx61_set_range(data, KMX61_RANGE_4G);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_ODCNTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) dev_err(&data->client->dev, "Error reading reg_odcntl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) data->odr_bits = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * set output data rate for wake up (motion detection) function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * to match data rate for accelerometer sampling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ret = kmx61_get_odr(data, &val, &val2, KMX61_ACC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) ret = kmx61_set_wake_up_odr(data, val, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) /* set acc/magn to OPERATION mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ret = kmx61_set_mode(data, 0, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) data->wake_thresh = KMX61_DEFAULT_WAKE_THRESH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) data->wake_duration = KMX61_DEFAULT_WAKE_DURATION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static int kmx61_setup_new_data_interrupt(struct kmx61_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) bool status, u8 device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) ret |= KMX61_REG_INC1_BIT_IEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (device & KMX61_ACC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) ret |= KMX61_REG_INC1_BIT_DRDYA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (device & KMX61_MAG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) ret |= KMX61_REG_INC1_BIT_DRDYM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) ret &= ~KMX61_REG_INC1_BIT_IEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (device & KMX61_ACC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) ret &= ~KMX61_REG_INC1_BIT_DRDYA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (device & KMX61_MAG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) ret &= ~KMX61_REG_INC1_BIT_DRDYM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ret |= KMX61_REG_CTRL1_BIT_DRDYE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) ret &= ~KMX61_REG_CTRL1_BIT_DRDYE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) static int kmx61_chip_update_thresholds(struct kmx61_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) ret = i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) KMX61_REG_WUF_TIMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) data->wake_duration);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) dev_err(&data->client->dev, "Errow writing reg_wuf_timer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) ret = i2c_smbus_write_byte_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) KMX61_REG_WUF_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) data->wake_thresh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) dev_err(&data->client->dev, "Error writing reg_wuf_thresh\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) static int kmx61_setup_any_motion_interrupt(struct kmx61_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) bool status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) ret = kmx61_chip_update_thresholds(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) dev_err(&data->client->dev, "Error reading reg_inc1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) ret |= (KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) ret &= ~(KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) dev_err(&data->client->dev, "Error writing reg_inc1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) ret |= KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) ret &= ~(KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) mode |= KMX61_ACT_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) * kmx61_set_power_state() - set power state for kmx61 @device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) * @data: kmx61 device private pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) * @on: power state to be set for @device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * @device: bitmask indicating device for which @on state needs to be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * Notice that when ACC power state needs to be set to ON and MAG is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * OPERATION then we know that kmx61_runtime_resume was already called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * so we must set ACC OPERATION mode here. The same happens when MAG power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * state needs to be set to ON and ACC is in OPERATION.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) static int kmx61_set_power_state(struct kmx61_data *data, bool on, u8 device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (device & KMX61_ACC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) if (on && !data->acc_ps && !data->mag_stby) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ret = kmx61_set_mode(data, 0, KMX61_ACC, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) data->acc_ps = on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (device & KMX61_MAG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (on && !data->mag_ps && !data->acc_stby) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) ret = kmx61_set_mode(data, 0, KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) data->mag_ps = on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) ret = pm_runtime_get_sync(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) pm_runtime_mark_last_busy(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) ret = pm_runtime_put_autosuspend(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) "Failed: kmx61_set_power_state for %d, ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) on, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) pm_runtime_put_noidle(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static int kmx61_read_measurement(struct kmx61_data *data, u8 base, u8 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) u8 reg = base + offset * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) ret = i2c_smbus_read_word_data(data->client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) dev_err(&data->client->dev, "failed to read reg at %x\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static int kmx61_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) struct iio_chan_spec const *chan, int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) u8 base_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) case IIO_ACCEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) base_reg = KMX61_ACC_XOUT_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) case IIO_MAGN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) base_reg = KMX61_MAG_XOUT_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) ret = kmx61_set_power_state(data, true, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ret = kmx61_read_measurement(data, base_reg, chan->scan_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) kmx61_set_power_state(data, false, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) *val = sign_extend32(ret >> chan->scan_type.shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) chan->scan_type.realbits - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) ret = kmx61_set_power_state(data, false, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) case IIO_ACCEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) *val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) *val2 = kmx61_uscale_table[data->range];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) case IIO_MAGN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) /* 14 bits res, 1465 microGauss per magn count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) *val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) *val2 = 1465;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) case IIO_CHAN_INFO_SAMP_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) ret = kmx61_get_odr(data, val, val2, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static int kmx61_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct iio_chan_spec const *chan, int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) case IIO_CHAN_INFO_SAMP_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) ret = kmx61_set_odr(data, val, val2, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) case IIO_ACCEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) if (val != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) ret = kmx61_set_scale(data, val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static int kmx61_read_event(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) enum iio_event_direction dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) enum iio_event_info info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) int *val, int *val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) *val2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) switch (info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) case IIO_EV_INFO_VALUE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) *val = data->wake_thresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) case IIO_EV_INFO_PERIOD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) *val = data->wake_duration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) static int kmx61_write_event(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) enum iio_event_direction dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) enum iio_event_info info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) int val, int val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) if (data->ev_enable_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) switch (info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) case IIO_EV_INFO_VALUE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) data->wake_thresh = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) case IIO_EV_INFO_PERIOD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) data->wake_duration = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) static int kmx61_read_event_config(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) enum iio_event_direction dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) return data->ev_enable_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) static int kmx61_write_event_config(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) enum iio_event_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) enum iio_event_direction dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) if (state && data->ev_enable_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) if (!state && data->motion_trig_on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) data->ev_enable_state = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) ret = kmx61_set_power_state(data, state, KMX61_ACC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) ret = kmx61_setup_any_motion_interrupt(data, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) kmx61_set_power_state(data, false, KMX61_ACC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) data->ev_enable_state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) err_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) static int kmx61_acc_validate_trigger(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) struct iio_trigger *trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) if (data->acc_dready_trig != trig && data->motion_trig != trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) static int kmx61_mag_validate_trigger(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) struct iio_trigger *trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) if (data->mag_dready_trig != trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) static const struct iio_info kmx61_acc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .read_raw = kmx61_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .write_raw = kmx61_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) .attrs = &kmx61_acc_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) .read_event_value = kmx61_read_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) .write_event_value = kmx61_write_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) .read_event_config = kmx61_read_event_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) .write_event_config = kmx61_write_event_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) .validate_trigger = kmx61_acc_validate_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) static const struct iio_info kmx61_mag_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) .read_raw = kmx61_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) .write_raw = kmx61_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) .attrs = &kmx61_mag_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) .validate_trigger = kmx61_mag_validate_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) static int kmx61_data_rdy_trigger_set_state(struct iio_trigger *trig,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) bool state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) u8 device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) if (!state && data->ev_enable_state && data->motion_trig_on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) data->motion_trig_on = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) if (data->acc_dready_trig == trig || data->motion_trig == trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) device = KMX61_ACC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) device = KMX61_MAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) ret = kmx61_set_power_state(data, state, device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (data->acc_dready_trig == trig || data->mag_dready_trig == trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) ret = kmx61_setup_new_data_interrupt(data, state, device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) ret = kmx61_setup_any_motion_interrupt(data, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) kmx61_set_power_state(data, false, device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) goto err_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) if (data->acc_dready_trig == trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) data->acc_dready_trig_on = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) else if (data->mag_dready_trig == trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) data->mag_dready_trig_on = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) data->motion_trig_on = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) err_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) static int kmx61_trig_try_reenable(struct iio_trigger *trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) dev_err(&data->client->dev, "Error reading reg_inl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) static const struct iio_trigger_ops kmx61_trigger_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) .set_trigger_state = kmx61_data_rdy_trigger_set_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) .try_reenable = kmx61_trig_try_reenable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) static irqreturn_t kmx61_event_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) struct kmx61_data *data = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) struct iio_dev *indio_dev = data->acc_indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) dev_err(&data->client->dev, "Error reading reg_ins1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) goto ack_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) if (ret & KMX61_REG_INS1_BIT_WUFS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) dev_err(&data->client->dev, "Error reading reg_ins2\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) goto ack_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) if (ret & KMX61_REG_INS2_BIT_XN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) iio_push_event(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) IIO_MOD_EVENT_CODE(IIO_ACCEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) IIO_MOD_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) IIO_EV_DIR_FALLING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) if (ret & KMX61_REG_INS2_BIT_XP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) iio_push_event(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) IIO_MOD_EVENT_CODE(IIO_ACCEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) IIO_MOD_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) IIO_EV_DIR_RISING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) if (ret & KMX61_REG_INS2_BIT_YN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) iio_push_event(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) IIO_MOD_EVENT_CODE(IIO_ACCEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) IIO_MOD_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) IIO_EV_DIR_FALLING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) if (ret & KMX61_REG_INS2_BIT_YP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) iio_push_event(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) IIO_MOD_EVENT_CODE(IIO_ACCEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) IIO_MOD_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) IIO_EV_DIR_RISING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) if (ret & KMX61_REG_INS2_BIT_ZN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) iio_push_event(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) IIO_MOD_EVENT_CODE(IIO_ACCEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) IIO_MOD_Z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) IIO_EV_DIR_FALLING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) if (ret & KMX61_REG_INS2_BIT_ZP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) iio_push_event(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) IIO_MOD_EVENT_CODE(IIO_ACCEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) IIO_MOD_Z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) IIO_EV_DIR_RISING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) ack_intr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) ret |= KMX61_REG_CTRL1_BIT_RES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) dev_err(&data->client->dev, "Error reading reg_inl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) static irqreturn_t kmx61_data_rdy_trig_poll(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) struct kmx61_data *data = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) if (data->acc_dready_trig_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) iio_trigger_poll(data->acc_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) if (data->mag_dready_trig_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) iio_trigger_poll(data->mag_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) if (data->motion_trig_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) iio_trigger_poll(data->motion_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) if (data->ev_enable_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) return IRQ_WAKE_THREAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) static irqreturn_t kmx61_trigger_handler(int irq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) struct iio_poll_func *pf = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) struct iio_dev *indio_dev = pf->indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) struct kmx61_data *data = kmx61_get_data(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) int bit, ret, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) u8 base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) s16 buffer[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) if (indio_dev == data->acc_indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) base = KMX61_ACC_XOUT_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) base = KMX61_MAG_XOUT_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) for_each_set_bit(bit, indio_dev->active_scan_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) indio_dev->masklength) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) ret = kmx61_read_measurement(data, base, bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) buffer[i++] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) iio_push_to_buffers(indio_dev, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) iio_trigger_notify_done(indio_dev->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) static const char *kmx61_match_acpi_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) const struct acpi_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) id = acpi_match_device(dev->driver->acpi_match_table, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) if (!id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) return dev_name(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) static struct iio_dev *kmx61_indiodev_setup(struct kmx61_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) const struct iio_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) int num_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) indio_dev = devm_iio_device_alloc(&data->client->dev, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) kmx61_set_data(indio_dev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) indio_dev->channels = chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) indio_dev->num_channels = num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) indio_dev->name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) indio_dev->info = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) return indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) static struct iio_trigger *kmx61_trigger_setup(struct kmx61_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) const char *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) struct iio_trigger *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) trig = devm_iio_trigger_alloc(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) "%s-%s-dev%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) indio_dev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) indio_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) if (!trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) trig->dev.parent = &data->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) trig->ops = &kmx61_trigger_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) iio_trigger_set_drvdata(trig, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) ret = iio_trigger_register(trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) return trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) static int kmx61_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) struct kmx61_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) const char *name = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) i2c_set_clientdata(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) if (id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) name = id->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) else if (ACPI_HANDLE(&client->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) name = kmx61_match_acpi_device(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) data->acc_indio_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) kmx61_indiodev_setup(data, &kmx61_acc_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) kmx61_acc_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) ARRAY_SIZE(kmx61_acc_channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) if (IS_ERR(data->acc_indio_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) return PTR_ERR(data->acc_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) data->mag_indio_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) kmx61_indiodev_setup(data, &kmx61_mag_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) kmx61_mag_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) ARRAY_SIZE(kmx61_mag_channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) if (IS_ERR(data->mag_indio_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) return PTR_ERR(data->mag_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) ret = kmx61_chip_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) if (client->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) ret = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) kmx61_data_rdy_trig_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) kmx61_event_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) IRQF_TRIGGER_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) KMX61_IRQ_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) goto err_chip_uninit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) data->acc_dready_trig =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) kmx61_trigger_setup(data, data->acc_indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) "dready");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) if (IS_ERR(data->acc_dready_trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) ret = PTR_ERR(data->acc_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) goto err_chip_uninit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) data->mag_dready_trig =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) kmx61_trigger_setup(data, data->mag_indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) "dready");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) if (IS_ERR(data->mag_dready_trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) ret = PTR_ERR(data->mag_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) goto err_trigger_unregister_acc_dready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) data->motion_trig =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) kmx61_trigger_setup(data, data->acc_indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) "any-motion");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) if (IS_ERR(data->motion_trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) ret = PTR_ERR(data->motion_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) goto err_trigger_unregister_mag_dready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) ret = iio_triggered_buffer_setup(data->acc_indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) &iio_pollfunc_store_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) kmx61_trigger_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) "Failed to setup acc triggered buffer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) goto err_trigger_unregister_motion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) ret = iio_triggered_buffer_setup(data->mag_indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) &iio_pollfunc_store_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) kmx61_trigger_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) "Failed to setup mag triggered buffer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) goto err_buffer_cleanup_acc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) ret = pm_runtime_set_active(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) goto err_buffer_cleanup_mag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) pm_runtime_enable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) pm_runtime_set_autosuspend_delay(&client->dev, KMX61_SLEEP_DELAY_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) pm_runtime_use_autosuspend(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) ret = iio_device_register(data->acc_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) dev_err(&client->dev, "Failed to register acc iio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) goto err_pm_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) ret = iio_device_register(data->mag_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) dev_err(&client->dev, "Failed to register mag iio device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) goto err_iio_unregister_acc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) err_iio_unregister_acc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) iio_device_unregister(data->acc_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) err_pm_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) pm_runtime_dont_use_autosuspend(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) err_buffer_cleanup_mag:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) if (client->irq > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) iio_triggered_buffer_cleanup(data->mag_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) err_buffer_cleanup_acc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) if (client->irq > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) iio_triggered_buffer_cleanup(data->acc_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) err_trigger_unregister_motion:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) iio_trigger_unregister(data->motion_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) err_trigger_unregister_mag_dready:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) iio_trigger_unregister(data->mag_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) err_trigger_unregister_acc_dready:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) iio_trigger_unregister(data->acc_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) err_chip_uninit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) static int kmx61_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) struct kmx61_data *data = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) iio_device_unregister(data->acc_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) iio_device_unregister(data->mag_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) pm_runtime_set_suspended(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) pm_runtime_put_noidle(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) if (client->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) iio_triggered_buffer_cleanup(data->acc_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) iio_triggered_buffer_cleanup(data->mag_indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) iio_trigger_unregister(data->acc_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) iio_trigger_unregister(data->mag_dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) iio_trigger_unregister(data->motion_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) static int kmx61_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) static int kmx61_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) u8 stby = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) if (data->acc_stby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) stby |= KMX61_ACC_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) if (data->mag_stby)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) stby |= KMX61_MAG_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) static int kmx61_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) static int kmx61_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) u8 stby = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) if (!data->acc_ps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) stby |= KMX61_ACC_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) if (!data->mag_ps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) stby |= KMX61_MAG_STBY_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) static const struct dev_pm_ops kmx61_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) SET_SYSTEM_SLEEP_PM_OPS(kmx61_suspend, kmx61_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) SET_RUNTIME_PM_OPS(kmx61_runtime_suspend, kmx61_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) static const struct acpi_device_id kmx61_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) {"KMX61021", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) MODULE_DEVICE_TABLE(acpi, kmx61_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) static const struct i2c_device_id kmx61_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) {"kmx611021", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) MODULE_DEVICE_TABLE(i2c, kmx61_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) static struct i2c_driver kmx61_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) .name = KMX61_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) .acpi_match_table = ACPI_PTR(kmx61_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) .pm = &kmx61_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) .probe = kmx61_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) .remove = kmx61_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) .id_table = kmx61_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) module_i2c_driver(kmx61_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) MODULE_DESCRIPTION("KMX61 accelerometer/magnetometer driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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