^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * enum mpu3050_fullscale - indicates the full range of the sensor in deg/sec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) enum mpu3050_fullscale {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) FS_250_DPS = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) FS_500_DPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) FS_1000_DPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) FS_2000_DPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * enum mpu3050_lpf - indicates the low pass filter width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) enum mpu3050_lpf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* This implicity sets sample frequency to 8 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) LPF_256_HZ_NOLPF = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* All others sets the sample frequency to 1 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) LPF_188_HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) LPF_98_HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) LPF_42_HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) LPF_20_HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) LPF_10_HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) LPF_5_HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) LPF_2100_HZ_NOLPF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) enum mpu3050_axis {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) AXIS_X = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) AXIS_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) AXIS_Z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) AXIS_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * struct mpu3050 - instance state container for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @dev: parent device for this instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @orientation: mounting matrix, flipped axis etc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * @map: regmap to reach the registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * @lock: serialization lock to marshal all requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * @irq: the IRQ used for this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * @regs: the regulators to power this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * @fullscale: the current fullscale setting for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * @lpf: digital low pass filter setting for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @divisor: base frequency divider: divides 8 or 1 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * @calibration: the three signed 16-bit calibration settings that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * get written into the offset registers for each axis to compensate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * for DC offsets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @trig: trigger for the MPU-3050 interrupt, if present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @hw_irq_trigger: hardware interrupt trigger is in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @irq_actl: interrupt is active low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @irq_latch: latched IRQ, this means that it is a level IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @irq_opendrain: the interrupt line shall be configured open drain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @pending_fifo_footer: tells us if there is a pending footer in the FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * that we have to read out first when handling the FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @hw_timestamp: latest hardware timestamp from the trigger IRQ, when in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * @i2cmux: an I2C mux reflecting the fact that this sensor is a hub with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * a pass-through I2C interface coming out of it: this device needs to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * powered up in order to reach devices on the other side of this mux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct mpu3050 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct iio_mount_matrix orientation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct regmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct regulator_bulk_data regs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) enum mpu3050_fullscale fullscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) enum mpu3050_lpf lpf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 divisor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) s16 calibration[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct iio_trigger *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) bool hw_irq_trigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) bool irq_actl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) bool irq_latch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) bool irq_opendrain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) bool pending_fifo_footer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) s64 hw_timestamp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct i2c_mux_core *i2cmux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Probe called from different transports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int mpu3050_common_probe(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct regmap *map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int mpu3050_common_remove(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* PM ops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) extern const struct dev_pm_ops mpu3050_dev_pm_ops;
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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