^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for NXP FXAS21002C Gyroscope - Header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2019 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef FXAS21002C_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define FXAS21002C_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define FXAS21002C_REG_STATUS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define FXAS21002C_REG_OUT_X_MSB 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define FXAS21002C_REG_OUT_X_LSB 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define FXAS21002C_REG_OUT_Y_MSB 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define FXAS21002C_REG_OUT_Y_LSB 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define FXAS21002C_REG_OUT_Z_MSB 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define FXAS21002C_REG_OUT_Z_LSB 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define FXAS21002C_REG_DR_STATUS 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define FXAS21002C_REG_F_STATUS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define FXAS21002C_REG_F_SETUP 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define FXAS21002C_REG_F_EVENT 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FXAS21002C_REG_INT_SRC_FLAG 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FXAS21002C_REG_WHO_AM_I 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define FXAS21002C_REG_CTRL0 0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FXAS21002C_REG_RT_CFG 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define FXAS21002C_REG_RT_SRC 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define FXAS21002C_REG_RT_THS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define FXAS21002C_REG_RT_COUNT 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define FXAS21002C_REG_TEMP 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define FXAS21002C_REG_CTRL1 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define FXAS21002C_REG_CTRL2 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define FXAS21002C_REG_CTRL3 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) enum fxas21002c_fields {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) F_DR_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) F_OUT_X_MSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) F_OUT_X_LSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) F_OUT_Y_MSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) F_OUT_Y_LSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) F_OUT_Z_MSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) F_OUT_Z_LSB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* DR_STATUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) F_ZYX_OW, F_Z_OW, F_Y_OW, F_X_OW, F_ZYX_DR, F_Z_DR, F_Y_DR, F_X_DR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* F_STATUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) F_OVF, F_WMKF, F_CNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* F_SETUP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) F_MODE, F_WMRK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* F_EVENT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) F_EVENT, FE_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* INT_SOURCE_FLAG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) F_BOOTEND, F_SRC_FIFO, F_SRC_RT, F_SRC_DRDY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* WHO_AM_I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) F_WHO_AM_I,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* CTRL_REG0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) F_BW, F_SPIW, F_SEL, F_HPF_EN, F_FS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* RT_CFG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) F_ELE, F_ZTEFE, F_YTEFE, F_XTEFE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* RT_SRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) F_EA, F_ZRT, F_ZRT_POL, F_YRT, F_YRT_POL, F_XRT, F_XRT_POL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* RT_THS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) F_DBCNTM, F_THS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* RT_COUNT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) F_RT_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* TEMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) F_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* CTRL_REG1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) F_RST, F_ST, F_DR, F_ACTIVE, F_READY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* CTRL_REG2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) F_INT_CFG_FIFO, F_INT_EN_FIFO, F_INT_CFG_RT, F_INT_EN_RT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) F_INT_CFG_DRDY, F_INT_EN_DRDY, F_IPOL, F_PP_OD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* CTRL_REG3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) F_WRAPTOONE, F_EXTCTRLEN, F_FS_DOUBLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* MAX FIELDS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) F_MAX_FIELDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) extern const struct dev_pm_ops fxas21002c_pm_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) void fxas21002c_core_remove(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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