^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ADIS16130 Digital Output, High Precision Angular Rate Sensor driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2010 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define ADIS16130_CON 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define ADIS16130_CON_RD (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ADIS16130_IOP 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* 1 = data-ready signal low when unread data on all channels; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ADIS16130_IOP_ALL_RDY (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define ADIS16130_IOP_SYNC (1 << 0) /* 1 = synchronization enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ADIS16130_RATEDATA 0x8 /* Gyroscope output, rate of rotation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ADIS16130_TEMPDATA 0xA /* Temperature output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ADIS16130_RATECS 0x28 /* Gyroscope channel setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ADIS16130_RATECS_EN (1 << 3) /* 1 = channel enable; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ADIS16130_TEMPCS 0x2A /* Temperature channel setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ADIS16130_TEMPCS_EN (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ADIS16130_RATECONV 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define ADIS16130_TEMPCONV 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define ADIS16130_MODE 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ADIS16130_MODE_24BIT (1 << 1) /* 1 = 24-bit resolution; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * struct adis16130_state - device instance specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @us: actual spi_device to write data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * @buf_lock: mutex to protect tx and rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @buf: unified tx/rx buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct adis16130_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct spi_device *us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct mutex buf_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u8 buf[4] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int adis16130_spi_read(struct iio_dev *indio_dev, u8 reg_addr, u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct adis16130_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct spi_transfer xfer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .tx_buf = st->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .rx_buf = st->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) mutex_lock(&st->buf_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) st->buf[0] = ADIS16130_CON_RD | reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) st->buf[1] = st->buf[2] = st->buf[3] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ret = spi_sync_transfer(st->us, &xfer, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *val = get_unaligned_be24(&st->buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) mutex_unlock(&st->buf_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int adis16130_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int *val, int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Take the iio_dev status lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ret = adis16130_spi_read(indio_dev, chan->address, &temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *val = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) case IIO_ANGL_VEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* 0 degree = 838860, 250 degree = 14260608 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) *val = 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) *val2 = 336440817; /* RAD_TO_DEGREE(14260608 - 8388608) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* 0C = 8036283, 105C = 9516048 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *val = 105000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) *val2 = 9516048 - 8036283;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) case IIO_CHAN_INFO_OFFSET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case IIO_ANGL_VEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) *val = -8388608;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) *val = -8036283;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static const struct iio_chan_spec adis16130_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .type = IIO_ANGL_VEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .modified = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .channel2 = IIO_MOD_Z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .address = ADIS16130_RATEDATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .indexed = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .address = ADIS16130_TEMPDATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct iio_info adis16130_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .read_raw = &adis16130_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int adis16130_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct adis16130_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* setup the industrialio driver allocated elements */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* this is only used for removal purposes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) st->us = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) mutex_init(&st->buf_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) indio_dev->name = spi->dev.driver->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) indio_dev->channels = adis16130_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) indio_dev->num_channels = ARRAY_SIZE(adis16130_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) indio_dev->info = &adis16130_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return devm_iio_device_register(&spi->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static struct spi_driver adis16130_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .name = "adis16130",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .probe = adis16130_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) module_spi_driver(adis16130_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MODULE_DESCRIPTION("Analog Devices ADIS16130 High Precision Angular Rate");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MODULE_ALIAS("spi:adis16130");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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