^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ADIS16080/100 Yaw Rate Gyroscope with SPI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2010 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ADIS16080_DIN_GYRO (0 << 10) /* Gyroscope output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define ADIS16080_DIN_TEMP (1 << 10) /* Temperature output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ADIS16080_DIN_AIN1 (2 << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ADIS16080_DIN_AIN2 (3 << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * 1: Write contents on DIN to control register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * 0: No changes to control register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ADIS16080_DIN_WRITE (1 << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct adis16080_chip_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int scale_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int scale_val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * struct adis16080_state - device instance specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * @us: actual spi_device to write data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @info: chip specific parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * @buf: transmit or receive buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * @lock: lock to protect buffer during reads
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct adis16080_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct spi_device *us;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) const struct adis16080_chip_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) __be16 buf ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int adis16080_read_sample(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u16 addr, int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct adis16080_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct spi_transfer t[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .tx_buf = &st->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .cs_change = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .rx_buf = &st->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) st->buf = cpu_to_be16(addr | ADIS16080_DIN_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ret = spi_sync_transfer(st->us, t, ARRAY_SIZE(t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) *val = sign_extend32(be16_to_cpu(st->buf), 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int adis16080_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct adis16080_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ret = adis16080_read_sample(indio_dev, chan->address, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return ret ? ret : IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) case IIO_ANGL_VEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *val = st->info->scale_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *val2 = st->info->scale_val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case IIO_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* VREF = 5V, 12 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *val = 5000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) *val2 = 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* 85 C = 585, 25 C = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) *val = 85000 - 25000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) *val2 = 585;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) case IIO_CHAN_INFO_OFFSET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) case IIO_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* 2.5 V = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) *val = 2048;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* 85 C = 585, 25 C = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) *val = DIV_ROUND_CLOSEST(25 * 585, 85 - 25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const struct iio_chan_spec adis16080_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .type = IIO_ANGL_VEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .modified = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .channel2 = IIO_MOD_Z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .address = ADIS16080_DIN_GYRO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .type = IIO_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .indexed = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .address = ADIS16080_DIN_AIN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .type = IIO_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .indexed = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .channel = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .address = ADIS16080_DIN_AIN2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .indexed = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .address = ADIS16080_DIN_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static const struct iio_info adis16080_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .read_raw = &adis16080_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ID_ADIS16080,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ID_ADIS16100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const struct adis16080_chip_info adis16080_chip_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) [ID_ADIS16080] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* 80 degree = 819, 819 rad = 46925 degree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .scale_val = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .scale_val2 = 46925,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) [ID_ADIS16100] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* 300 degree = 1230, 1230 rad = 70474 degree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .scale_val = 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .scale_val2 = 70474,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int adis16080_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) const struct spi_device_id *id = spi_get_device_id(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct adis16080_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /* setup the industrialio driver allocated elements */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* this is only used for removal purposes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) mutex_init(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* Allocate the comms buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) st->us = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) st->info = &adis16080_chip_info[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) indio_dev->name = spi->dev.driver->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) indio_dev->channels = adis16080_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) indio_dev->num_channels = ARRAY_SIZE(adis16080_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) indio_dev->info = &adis16080_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int adis16080_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) iio_device_unregister(spi_get_drvdata(spi));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const struct spi_device_id adis16080_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) { "adis16080", ID_ADIS16080 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) { "adis16100", ID_ADIS16100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MODULE_DEVICE_TABLE(spi, adis16080_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static struct spi_driver adis16080_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .name = "adis16080",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .probe = adis16080_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .remove = adis16080_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .id_table = adis16080_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) module_spi_driver(adis16080_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MODULE_DESCRIPTION("Analog Devices ADIS16080/100 Yaw Rate Gyroscope Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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