Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ti-dac5571.c - Texas Instruments 8/10/12-bit 1/4-channel DAC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2018 Prevas A/S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * https://www.ti.com/lit/ds/symlink/dac5571.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * https://www.ti.com/lit/ds/symlink/dac6571.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * https://www.ti.com/lit/ds/symlink/dac7571.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * https://www.ti.com/lit/ds/symlink/dac5574.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * https://www.ti.com/lit/ds/symlink/dac6574.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * https://www.ti.com/lit/ds/symlink/dac7574.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * https://www.ti.com/lit/ds/symlink/dac5573.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * https://www.ti.com/lit/ds/symlink/dac6573.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * https://www.ti.com/lit/ds/symlink/dac7573.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) enum chip_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	single_8bit, single_10bit, single_12bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	quad_8bit, quad_10bit, quad_12bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) struct dac5571_spec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	u8 num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	u8 resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static const struct dac5571_spec dac5571_spec[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	[single_8bit]  = {.num_channels = 1, .resolution =  8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	[single_10bit] = {.num_channels = 1, .resolution = 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	[single_12bit] = {.num_channels = 1, .resolution = 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	[quad_8bit]    = {.num_channels = 4, .resolution =  8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	[quad_10bit]   = {.num_channels = 4, .resolution = 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	[quad_12bit]   = {.num_channels = 4, .resolution = 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) struct dac5571_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct regulator *vref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	u16 val[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	bool powerdown[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	u8 powerdown_mode[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct dac5571_spec const *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	int (*dac5571_cmd)(struct dac5571_data *data, int channel, u16 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int (*dac5571_pwrdwn)(struct dac5571_data *data, int channel, u8 pwrdwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u8 buf[3] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define DAC5571_POWERDOWN(mode)		((mode) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define DAC5571_POWERDOWN_FLAG		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define DAC5571_CHANNEL_SELECT		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define DAC5571_LOADMODE_DIRECT		BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define DAC5571_SINGLE_PWRDWN_BITS	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define DAC5571_QUAD_PWRDWN_BITS	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static int dac5571_cmd_single(struct dac5571_data *data, int channel, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	unsigned int shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	shift = 12 - data->spec->resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	data->buf[1] = val << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	data->buf[0] = val >> (8 - shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	if (i2c_master_send(data->client, data->buf, 2) != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static int dac5571_cmd_quad(struct dac5571_data *data, int channel, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	unsigned int shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	shift = 16 - data->spec->resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	data->buf[2] = val << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	data->buf[1] = (val >> (8 - shift));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	data->buf[0] = (channel << DAC5571_CHANNEL_SELECT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		       DAC5571_LOADMODE_DIRECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (i2c_master_send(data->client, data->buf, 3) != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static int dac5571_pwrdwn_single(struct dac5571_data *data, int channel, u8 pwrdwn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	data->buf[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	data->buf[0] = pwrdwn << DAC5571_SINGLE_PWRDWN_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (i2c_master_send(data->client, data->buf, 2) != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static int dac5571_pwrdwn_quad(struct dac5571_data *data, int channel, u8 pwrdwn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	data->buf[2] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	data->buf[1] = pwrdwn << DAC5571_QUAD_PWRDWN_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	data->buf[0] = (channel << DAC5571_CHANNEL_SELECT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		       DAC5571_LOADMODE_DIRECT | DAC5571_POWERDOWN_FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (i2c_master_send(data->client, data->buf, 3) != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const char *const dac5571_powerdown_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	"1kohm_to_gnd", "100kohm_to_gnd", "three_state",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int dac5571_get_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				      const struct iio_chan_spec *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct dac5571_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	return data->powerdown_mode[chan->channel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int dac5571_set_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 				      const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 				      unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	struct dac5571_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (data->powerdown_mode[chan->channel] == mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (data->powerdown[chan->channel]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		ret = data->dac5571_pwrdwn(data, chan->channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 					   DAC5571_POWERDOWN(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	data->powerdown_mode[chan->channel] = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct iio_enum dac5571_powerdown_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	.items = dac5571_powerdown_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	.num_items = ARRAY_SIZE(dac5571_powerdown_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	.get = dac5571_get_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	.set = dac5571_set_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static ssize_t dac5571_read_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				      uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 				      const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 				      char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct dac5571_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	return sprintf(buf, "%d\n", data->powerdown[chan->channel]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static ssize_t dac5571_write_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 				       uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 				       const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 				       const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct dac5571_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	bool powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	ret = strtobool(buf, &powerdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (data->powerdown[chan->channel] == powerdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (powerdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		ret = data->dac5571_pwrdwn(data, chan->channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			    DAC5571_POWERDOWN(data->powerdown_mode[chan->channel]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		ret = data->dac5571_cmd(data, chan->channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				data->val[chan->channel]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	data->powerdown[chan->channel] = powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	return ret ? ret : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const struct iio_chan_spec_ext_info dac5571_ext_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		.name	   = "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		.read	   = dac5571_read_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		.write	   = dac5571_write_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		.shared	   = IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &dac5571_powerdown_mode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	IIO_ENUM_AVAILABLE("powerdown_mode", &dac5571_powerdown_mode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define dac5571_CHANNEL(chan, name) {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	.type = IIO_VOLTAGE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	.channel = (chan),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	.address = (chan),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	.indexed = true,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	.output = true,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.datasheet_name = name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	.ext_info = dac5571_ext_info,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static const struct iio_chan_spec dac5571_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	dac5571_CHANNEL(0, "A"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	dac5571_CHANNEL(1, "B"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	dac5571_CHANNEL(2, "C"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	dac5571_CHANNEL(3, "D"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int dac5571_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			    int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	struct dac5571_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		*val = data->val[chan->channel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		ret = regulator_get_voltage(data->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		*val = ret / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		*val2 = data->spec->resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int dac5571_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			     struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			     int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	struct dac5571_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		if (data->val[chan->channel] == val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		if (val >= (1 << data->spec->resolution) || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		if (data->powerdown[chan->channel])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		ret = data->dac5571_cmd(data, chan->channel, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			data->val[chan->channel] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static int dac5571_write_raw_get_fmt(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 				     struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 				     long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static const struct iio_info dac5571_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	.read_raw = dac5571_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.write_raw = dac5571_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	.write_raw_get_fmt = dac5571_write_raw_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int dac5571_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	const struct dac5571_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	struct dac5571_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	indio_dev->info = &dac5571_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	indio_dev->name = id->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	indio_dev->channels = dac5571_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	spec = &dac5571_spec[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	indio_dev->num_channels = spec->num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	data->spec = spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	data->vref = devm_regulator_get(dev, "vref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	if (IS_ERR(data->vref))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		return PTR_ERR(data->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	ret = regulator_enable(data->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	switch (spec->num_channels) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		data->dac5571_cmd = dac5571_cmd_single;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		data->dac5571_pwrdwn = dac5571_pwrdwn_single;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		data->dac5571_cmd = dac5571_cmd_quad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		data->dac5571_pwrdwn = dac5571_pwrdwn_quad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	for (i = 0; i < spec->num_channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		ret = data->dac5571_cmd(data, i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			dev_err(dev, "failed to initialize channel %d to 0\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)  err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	regulator_disable(data->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static int dac5571_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	struct iio_dev *indio_dev = i2c_get_clientdata(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	struct dac5571_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	regulator_disable(data->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static const struct of_device_id dac5571_of_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	{.compatible = "ti,dac5571"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	{.compatible = "ti,dac6571"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	{.compatible = "ti,dac7571"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	{.compatible = "ti,dac5574"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	{.compatible = "ti,dac6574"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	{.compatible = "ti,dac7574"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	{.compatible = "ti,dac5573"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	{.compatible = "ti,dac6573"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	{.compatible = "ti,dac7573"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) MODULE_DEVICE_TABLE(of, dac5571_of_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static const struct i2c_device_id dac5571_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	{"dac5571", single_8bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	{"dac6571", single_10bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	{"dac7571", single_12bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	{"dac5574", quad_8bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	{"dac6574", quad_10bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	{"dac7574", quad_12bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	{"dac5573", quad_8bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	{"dac6573", quad_10bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	{"dac7573", quad_12bit},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) MODULE_DEVICE_TABLE(i2c, dac5571_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static struct i2c_driver dac5571_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		   .name = "ti-dac5571",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		   .of_match_table = dac5571_of_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	.probe	  = dac5571_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	.remove   = dac5571_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	.id_table = dac5571_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) module_i2c_driver(dac5571_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.dk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) MODULE_DESCRIPTION("Texas Instruments 8/10/12-bit 1/4-channel DAC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) MODULE_LICENSE("GPL v2");