Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ti-dac082s085.c - Texas Instruments 8/10/12-bit 2/4-channel DAC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2017 KUNBUS GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * https://www.ti.com/lit/ds/symlink/dac082s085.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * https://www.ti.com/lit/ds/symlink/dac102s085.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * https://www.ti.com/lit/ds/symlink/dac122s085.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * https://www.ti.com/lit/ds/symlink/dac084s085.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * https://www.ti.com/lit/ds/symlink/dac104s085.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * https://www.ti.com/lit/ds/symlink/dac124s085.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) enum { dual_8bit, dual_10bit, dual_12bit, quad_8bit, quad_10bit, quad_12bit };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) struct ti_dac_spec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	u8 num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	u8 resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static const struct ti_dac_spec ti_dac_spec[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	[dual_8bit]  = { .num_channels = 2, .resolution = 8  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	[dual_10bit] = { .num_channels = 2, .resolution = 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	[dual_12bit] = { .num_channels = 2, .resolution = 12 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	[quad_8bit]  = { .num_channels = 4, .resolution = 8  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	[quad_10bit] = { .num_channels = 4, .resolution = 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	[quad_12bit] = { .num_channels = 4, .resolution = 12 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * struct ti_dac_chip - TI DAC chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * @lock: protects write sequences
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * @vref: regulator generating Vref
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * @mesg: SPI message to perform a write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * @xfer: SPI transfer used by @mesg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * @val: cached value of each output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * @powerdown: whether the chip is powered down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * @powerdown_mode: selected by the user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * @resolution: resolution of the chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * @buf: buffer for @xfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) struct ti_dac_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct regulator *vref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct spi_message mesg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct spi_transfer xfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u16 val[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	bool powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u8 powerdown_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	u8 resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u8 buf[2] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define WRITE_NOT_UPDATE(chan)	(0x00 | (chan) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define WRITE_AND_UPDATE(chan)	(0x10 | (chan) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define WRITE_ALL_UPDATE	 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define POWERDOWN(mode) 	(0x30 | ((mode) + 1) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static int ti_dac_cmd(struct ti_dac_chip *ti_dac, u8 cmd, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	u8 shift = 12 - ti_dac->resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	ti_dac->buf[0] = cmd | (val >> (8 - shift));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	ti_dac->buf[1] = (val << shift) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	return spi_sync(ti_dac->mesg.spi, &ti_dac->mesg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static const char * const ti_dac_powerdown_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	"2.5kohm_to_gnd", "100kohm_to_gnd", "three_state",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static int ti_dac_get_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 				     const struct iio_chan_spec *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct ti_dac_chip *ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return ti_dac->powerdown_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static int ti_dac_set_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 				     const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 				     unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct ti_dac_chip *ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (ti_dac->powerdown_mode == mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	mutex_lock(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	if (ti_dac->powerdown) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		ret = ti_dac_cmd(ti_dac, POWERDOWN(mode), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	ti_dac->powerdown_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	mutex_unlock(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const struct iio_enum ti_dac_powerdown_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.items = ti_dac_powerdown_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	.num_items = ARRAY_SIZE(ti_dac_powerdown_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	.get = ti_dac_get_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	.set = ti_dac_set_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static ssize_t ti_dac_read_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 				     uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 				     const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 				     char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct ti_dac_chip *ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	return sprintf(buf, "%d\n", ti_dac->powerdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static ssize_t ti_dac_write_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				      uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 				      const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 				      const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct ti_dac_chip *ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	bool powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	ret = strtobool(buf, &powerdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (ti_dac->powerdown == powerdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	mutex_lock(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (powerdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		ret = ti_dac_cmd(ti_dac, POWERDOWN(ti_dac->powerdown_mode), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		ret = ti_dac_cmd(ti_dac, WRITE_AND_UPDATE(0), ti_dac->val[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		ti_dac->powerdown = powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	mutex_unlock(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	return ret ? ret : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct iio_chan_spec_ext_info ti_dac_ext_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		.name	   = "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		.read	   = ti_dac_read_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		.write	   = ti_dac_write_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		.shared	   = IIO_SHARED_BY_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE, &ti_dac_powerdown_mode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	IIO_ENUM_AVAILABLE("powerdown_mode", &ti_dac_powerdown_mode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define TI_DAC_CHANNEL(chan) {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.type = IIO_VOLTAGE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.channel = (chan),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.address = (chan),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.indexed = true,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.output = true,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.datasheet_name = (const char[]){ 'A' + (chan), 0 },	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.ext_info = ti_dac_ext_info,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const struct iio_chan_spec ti_dac_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	TI_DAC_CHANNEL(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	TI_DAC_CHANNEL(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	TI_DAC_CHANNEL(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	TI_DAC_CHANNEL(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int ti_dac_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			   int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct ti_dac_chip *ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		*val = ti_dac->val[chan->channel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		ret = regulator_get_voltage(ti_dac->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		*val = ret / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		*val2 = ti_dac->resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		ret = IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int ti_dac_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			    int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	struct ti_dac_chip *ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		if (ti_dac->val[chan->channel] == val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		if (val >= (1 << ti_dac->resolution) || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		if (ti_dac->powerdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		mutex_lock(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		ret = ti_dac_cmd(ti_dac, WRITE_AND_UPDATE(chan->channel), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			ti_dac->val[chan->channel] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		mutex_unlock(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int ti_dac_write_raw_get_fmt(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 				    struct iio_chan_spec const *chan, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const struct iio_info ti_dac_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	.read_raw	   = ti_dac_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	.write_raw	   = ti_dac_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	.write_raw_get_fmt = ti_dac_write_raw_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int ti_dac_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	struct device *dev = &spi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	const struct ti_dac_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	struct ti_dac_chip *ti_dac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	indio_dev = devm_iio_device_alloc(dev, sizeof(*ti_dac));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	indio_dev->info = &ti_dac_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	indio_dev->name = spi->modalias;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	indio_dev->channels = ti_dac_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	ti_dac->xfer.tx_buf = &ti_dac->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	ti_dac->xfer.len = sizeof(ti_dac->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	spi_message_init_with_transfers(&ti_dac->mesg, &ti_dac->xfer, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	ti_dac->mesg.spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	spec = &ti_dac_spec[spi_get_device_id(spi)->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	indio_dev->num_channels = spec->num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	ti_dac->resolution = spec->resolution;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	ti_dac->vref = devm_regulator_get(dev, "vref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (IS_ERR(ti_dac->vref))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		return PTR_ERR(ti_dac->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	ret = regulator_enable(ti_dac->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	mutex_init(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	ret = ti_dac_cmd(ti_dac, WRITE_ALL_UPDATE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		dev_err(dev, "failed to initialize outputs to 0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	mutex_destroy(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	regulator_disable(ti_dac->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static int ti_dac_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	struct ti_dac_chip *ti_dac = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	mutex_destroy(&ti_dac->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	regulator_disable(ti_dac->vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static const struct of_device_id ti_dac_of_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	{ .compatible = "ti,dac082s085" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	{ .compatible = "ti,dac102s085" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	{ .compatible = "ti,dac122s085" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	{ .compatible = "ti,dac084s085" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	{ .compatible = "ti,dac104s085" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	{ .compatible = "ti,dac124s085" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MODULE_DEVICE_TABLE(of, ti_dac_of_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static const struct spi_device_id ti_dac_spi_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	{ "dac082s085", dual_8bit  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	{ "dac102s085", dual_10bit },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	{ "dac122s085", dual_12bit },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	{ "dac084s085", quad_8bit  },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	{ "dac104s085", quad_10bit },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	{ "dac124s085", quad_12bit },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MODULE_DEVICE_TABLE(spi, ti_dac_spi_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static struct spi_driver ti_dac_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		.name		= "ti-dac082s085",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		.of_match_table	= ti_dac_of_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	.probe	  = ti_dac_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	.remove   = ti_dac_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	.id_table = ti_dac_spi_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) module_spi_driver(ti_dac_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MODULE_AUTHOR("Lukas Wunner <lukas@wunner.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MODULE_DESCRIPTION("Texas Instruments 8/10/12-bit 2/4-channel DAC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MODULE_LICENSE("GPL v2");