Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * mcp4725.c - Support for Microchip MCP4725/6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2012 Peter Meerwald <pmeerw@pmeerw.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Based on max517 by Roland Stigge <stigge@antcom.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * driver for the Microchip I2C 12-bit digital-to-analog converter (DAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * (7-bit I2C slave address 0x60, the three LSBs can be configured in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * hardware)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/iio/dac/mcp4725.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MCP4725_DRV_NAME "mcp4725"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define MCP472X_REF_VDD			0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MCP472X_REF_VREF_UNBUFFERED	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MCP472X_REF_VREF_BUFFERED	0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) struct mcp4725_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	unsigned ref_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	bool vref_buffered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u16 dac_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	bool powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	unsigned powerdown_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct regulator *vdd_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct regulator *vref_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int __maybe_unused mcp4725_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct mcp4725_data *data = iio_priv(i2c_get_clientdata(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u8 outbuf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	outbuf[0] = (data->powerdown_mode + 1) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	outbuf[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	data->powerdown = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	return i2c_master_send(data->client, outbuf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static int __maybe_unused mcp4725_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct mcp4725_data *data = iio_priv(i2c_get_clientdata(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u8 outbuf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	/* restore previous DAC value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	outbuf[0] = (data->dac_value >> 8) & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	outbuf[1] = data->dac_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	data->powerdown = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	return i2c_master_send(data->client, outbuf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static SIMPLE_DEV_PM_OPS(mcp4725_pm_ops, mcp4725_suspend, mcp4725_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static ssize_t mcp4725_store_eeprom(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct device_attribute *attr, const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int tries = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	u8 inoutbuf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	bool state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	ret = strtobool(buf, &state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (!state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	inoutbuf[0] = 0x60; /* write EEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	inoutbuf[0] |= data->ref_mode << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	inoutbuf[0] |= data->powerdown ? ((data->powerdown_mode + 1) << 1) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	inoutbuf[1] = data->dac_value >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	inoutbuf[2] = (data->dac_value & 0xf) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	ret = i2c_master_send(data->client, inoutbuf, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	else if (ret != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* wait for write complete, takes up to 50ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	while (tries--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		ret = i2c_master_recv(data->client, inoutbuf, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		else if (ret != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		if (inoutbuf[0] & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if (tries < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			"mcp4725_store_eeprom() failed, incomplete\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static IIO_DEVICE_ATTR(store_eeprom, S_IWUSR, NULL, mcp4725_store_eeprom, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static struct attribute *mcp4725_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	&iio_dev_attr_store_eeprom.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const struct attribute_group mcp4725_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.attrs = mcp4725_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const char * const mcp4725_powerdown_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	"1kohm_to_gnd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	"100kohm_to_gnd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	"500kohm_to_gnd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const char * const mcp4726_powerdown_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	"1kohm_to_gnd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	"125kohm_to_gnd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	"640kohm_to_gnd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int mcp4725_get_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	const struct iio_chan_spec *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	return data->powerdown_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int mcp4725_set_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	const struct iio_chan_spec *chan, unsigned mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	data->powerdown_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static ssize_t mcp4725_read_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	uintptr_t private, const struct iio_chan_spec *chan, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return sprintf(buf, "%d\n", data->powerdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static ssize_t mcp4725_write_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	 uintptr_t private, const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	 const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	bool state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	ret = strtobool(buf, &state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		ret = mcp4725_suspend(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		ret = mcp4725_resume(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) enum chip_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	MCP4725,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	MCP4726,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct iio_enum mcp472x_powerdown_mode_enum[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	[MCP4725] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		.items = mcp4725_powerdown_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		.num_items = ARRAY_SIZE(mcp4725_powerdown_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		.get = mcp4725_get_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		.set = mcp4725_set_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	[MCP4726] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		.items = mcp4726_powerdown_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		.num_items = ARRAY_SIZE(mcp4726_powerdown_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		.get = mcp4725_get_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		.set = mcp4725_set_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static const struct iio_chan_spec_ext_info mcp4725_ext_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		.name = "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		.read = mcp4725_read_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		.write = mcp4725_write_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		.shared = IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	IIO_ENUM("powerdown_mode", IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			&mcp472x_powerdown_mode_enum[MCP4725]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	IIO_ENUM_AVAILABLE("powerdown_mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			&mcp472x_powerdown_mode_enum[MCP4725]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static const struct iio_chan_spec_ext_info mcp4726_ext_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		.name = "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		.read = mcp4725_read_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		.write = mcp4725_write_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		.shared = IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	IIO_ENUM("powerdown_mode", IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			&mcp472x_powerdown_mode_enum[MCP4726]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	IIO_ENUM_AVAILABLE("powerdown_mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			&mcp472x_powerdown_mode_enum[MCP4726]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static const struct iio_chan_spec mcp472x_channel[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	[MCP4725] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		.type		= IIO_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		.indexed	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		.output		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		.channel	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		.ext_info	= mcp4725_ext_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	[MCP4726] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		.type		= IIO_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		.indexed	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		.output		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		.channel	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		.ext_info	= mcp4726_ext_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int mcp4725_set_value(struct iio_dev *indio_dev, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	u8 outbuf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	if (val >= (1 << 12) || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	outbuf[0] = (val >> 8) & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	outbuf[1] = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	ret = i2c_master_send(data->client, outbuf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	else if (ret != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int mcp4726_set_cfg(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	u8 outbuf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	outbuf[0] = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	outbuf[0] |= data->ref_mode << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	if (data->powerdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		outbuf[0] |= data->powerdown << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	outbuf[1] = data->dac_value >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	outbuf[2] = (data->dac_value & 0xf) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	ret = i2c_master_send(data->client, outbuf, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	else if (ret != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int mcp4725_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 			   int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		*val = data->dac_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		if (data->ref_mode == MCP472X_REF_VDD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 			ret = regulator_get_voltage(data->vdd_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 			ret = regulator_get_voltage(data->vref_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		*val = ret / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		*val2 = 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int mcp4725_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			       struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 			       int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		ret = mcp4725_set_value(indio_dev, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		data->dac_value = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static const struct iio_info mcp4725_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	.read_raw = mcp4725_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	.write_raw = mcp4725_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	.attrs = &mcp4725_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static int mcp4725_probe_dt(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			    struct mcp4725_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	/* check if is the vref-supply defined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	pdata->use_vref = device_property_read_bool(dev, "vref-supply");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	pdata->vref_buffered =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		device_property_read_bool(dev, "microchip,vref-buffered");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static int mcp4725_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	struct mcp4725_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	struct mcp4725_platform_data *pdata, pdata_dt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	u8 inbuf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	u8 pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	u8 ref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	if (indio_dev == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	if (dev_fwnode(&client->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		data->id = (enum chip_id)device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		data->id = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		err = mcp4725_probe_dt(&client->dev, &pdata_dt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 				"invalid platform or devicetree data");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		pdata = &pdata_dt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	if (data->id == MCP4725 && pdata->use_vref) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 			"external reference is unavailable on MCP4725");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	if (!pdata->use_vref && pdata->vref_buffered) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 			"buffering is unavailable on the internal reference");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	if (!pdata->use_vref)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		data->ref_mode = MCP472X_REF_VDD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		data->ref_mode = pdata->vref_buffered ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 			MCP472X_REF_VREF_BUFFERED :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 			MCP472X_REF_VREF_UNBUFFERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	data->vdd_reg = devm_regulator_get(&client->dev, "vdd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	if (IS_ERR(data->vdd_reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		return PTR_ERR(data->vdd_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	err = regulator_enable(data->vdd_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	if (pdata->use_vref) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		data->vref_reg = devm_regulator_get(&client->dev, "vref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 		if (IS_ERR(data->vref_reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 			err = PTR_ERR(data->vref_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 			goto err_disable_vdd_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		err = regulator_enable(data->vref_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 			goto err_disable_vdd_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	indio_dev->name = id->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	indio_dev->info = &mcp4725_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	indio_dev->channels = &mcp472x_channel[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	indio_dev->num_channels = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	/* read current DAC value and settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	err = i2c_master_recv(client, inbuf, data->id == MCP4725 ? 3 : 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 		dev_err(&client->dev, "failed to read DAC value");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 		goto err_disable_vref_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	pd = (inbuf[0] >> 1) & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	data->powerdown = pd > 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	data->powerdown_mode = pd ? pd - 1 : 2; /* largest resistor to gnd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	data->dac_value = (inbuf[1] << 4) | (inbuf[2] >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	if (data->id == MCP4726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 		ref = (inbuf[3] >> 3) & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	if (data->id == MCP4726 && ref != data->ref_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		dev_info(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 			"voltage reference mode differs (conf: %u, eeprom: %u), setting %u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 			data->ref_mode, ref, data->ref_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 		err = mcp4726_set_cfg(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 			goto err_disable_vref_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)  
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	err = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		goto err_disable_vref_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) err_disable_vref_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	if (data->vref_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 		regulator_disable(data->vref_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) err_disable_vdd_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	regulator_disable(data->vdd_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int mcp4725_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	struct mcp4725_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	if (data->vref_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 		regulator_disable(data->vref_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	regulator_disable(data->vdd_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static const struct i2c_device_id mcp4725_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	{ "mcp4725", MCP4725 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	{ "mcp4726", MCP4726 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) MODULE_DEVICE_TABLE(i2c, mcp4725_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static const struct of_device_id mcp4725_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 		.compatible = "microchip,mcp4725",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 		.data = (void *)MCP4725
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 		.compatible = "microchip,mcp4726",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 		.data = (void *)MCP4726
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) MODULE_DEVICE_TABLE(of, mcp4725_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static struct i2c_driver mcp4725_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 		.name	= MCP4725_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 		.of_match_table = mcp4725_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 		.pm	= &mcp4725_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	.probe		= mcp4725_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	.remove		= mcp4725_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	.id_table	= mcp4725_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) module_i2c_driver(mcp4725_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) MODULE_DESCRIPTION("MCP4725/6 12-bit DAC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) MODULE_LICENSE("GPL");