Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * AD5624R, AD5644R, AD5664R Digital to analog convertors spi driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2010-2011 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include "ad5624r.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static int ad5624r_spi_write(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 			     u8 cmd, u8 addr, u16 val, u8 shift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	u8 msg[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	 * The input shift register is 24 bits wide. The first two bits are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	 * don't care bits. The next three are the command bits, C2 to C0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	 * followed by the 3-bit DAC address, A2 to A0, and then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	 * 16-, 14-, 12-bit data-word. The data-word comprises the 16-,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	 * 14-, 12-bit input code followed by 0, 2, or 4 don't care bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	 * for the AD5664R, AD5644R, and AD5624R, respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	data = (0 << 22) | (cmd << 19) | (addr << 16) | (val << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	put_unaligned_be24(data, &msg[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return spi_write(spi, msg, sizeof(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int ad5624r_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			   int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 			   int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 			   long m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct ad5624r_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	switch (m) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		*val = st->vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		*val2 = chan->scan_type.realbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static int ad5624r_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			       struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			       int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			       int val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 			       long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct ad5624r_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		if (val >= (1 << chan->scan_type.realbits) || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		return ad5624r_spi_write(st->us,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 				AD5624R_CMD_WRITE_INPUT_N_UPDATE_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 				chan->address, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 				chan->scan_type.shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static const char * const ad5624r_powerdown_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	"1kohm_to_gnd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	"100kohm_to_gnd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	"three_state"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static int ad5624r_get_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	const struct iio_chan_spec *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct ad5624r_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	return st->pwr_down_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static int ad5624r_set_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	const struct iio_chan_spec *chan, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct ad5624r_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	st->pwr_down_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const struct iio_enum ad5624r_powerdown_mode_enum = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.items = ad5624r_powerdown_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	.num_items = ARRAY_SIZE(ad5624r_powerdown_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.get = ad5624r_get_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	.set = ad5624r_set_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static ssize_t ad5624r_read_dac_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	uintptr_t private, const struct iio_chan_spec *chan, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	struct ad5624r_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			!!(st->pwr_down_mask & (1 << chan->channel)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static ssize_t ad5624r_write_dac_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	bool pwr_down;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	struct ad5624r_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	ret = strtobool(buf, &pwr_down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (pwr_down)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		st->pwr_down_mask |= (1 << chan->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		st->pwr_down_mask &= ~(1 << chan->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	ret = ad5624r_spi_write(st->us, AD5624R_CMD_POWERDOWN_DAC, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 				(st->pwr_down_mode << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 				st->pwr_down_mask, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	return ret ? ret : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static const struct iio_info ad5624r_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	.write_raw = ad5624r_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.read_raw = ad5624r_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const struct iio_chan_spec_ext_info ad5624r_ext_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		.name = "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		.read = ad5624r_read_dac_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		.write = ad5624r_write_dac_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		.shared = IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		 &ad5624r_powerdown_mode_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5624r_powerdown_mode_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define AD5624R_CHANNEL(_chan, _bits) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.type = IIO_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.output = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.channel = (_chan), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.address = (_chan), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		.sign = 'u', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		.realbits = (_bits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		.storagebits = 16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		.shift = 16 - (_bits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	}, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.ext_info = ad5624r_ext_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define DECLARE_AD5624R_CHANNELS(_name, _bits) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	const struct iio_chan_spec _name##_channels[] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		AD5624R_CHANNEL(0, _bits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		AD5624R_CHANNEL(1, _bits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		AD5624R_CHANNEL(2, _bits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		AD5624R_CHANNEL(3, _bits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static DECLARE_AD5624R_CHANNELS(ad5624r, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static DECLARE_AD5624R_CHANNELS(ad5644r, 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static DECLARE_AD5624R_CHANNELS(ad5664r, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static const struct ad5624r_chip_info ad5624r_chip_info_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	[ID_AD5624R3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		.channels = ad5624r_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		.int_vref_mv = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	[ID_AD5624R5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		.channels = ad5624r_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		.int_vref_mv = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	[ID_AD5644R3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		.channels = ad5644r_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		.int_vref_mv = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	[ID_AD5644R5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		.channels = ad5644r_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		.int_vref_mv = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	[ID_AD5664R3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		.channels = ad5664r_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		.int_vref_mv = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	[ID_AD5664R5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		.channels = ad5664r_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		.int_vref_mv = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int ad5624r_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct ad5624r_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	int ret, voltage_uv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	st->reg = devm_regulator_get_optional(&spi->dev, "vref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	if (!IS_ERR(st->reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		ret = regulator_enable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		ret = regulator_get_voltage(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		voltage_uv = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		if (PTR_ERR(st->reg) != -ENODEV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			return PTR_ERR(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		/* Backwards compatibility. This naming is not correct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		st->reg = devm_regulator_get_optional(&spi->dev, "vcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		if (!IS_ERR(st->reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			ret = regulator_enable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			ret = regulator_get_voltage(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 				goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			voltage_uv = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	st->chip_info =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		&ad5624r_chip_info_tbl[spi_get_device_id(spi)->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	if (voltage_uv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		st->vref_mv = voltage_uv / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		st->vref_mv = st->chip_info->int_vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	st->us = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	indio_dev->name = spi_get_device_id(spi)->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	indio_dev->info = &ad5624r_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	indio_dev->channels = st->chip_info->channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	indio_dev->num_channels = AD5624R_DAC_CHANNELS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	ret = ad5624r_spi_write(spi, AD5624R_CMD_INTERNAL_REFER_SETUP, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 				!!voltage_uv, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) error_disable_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	if (!IS_ERR(st->reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		regulator_disable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static int ad5624r_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	struct ad5624r_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	if (!IS_ERR(st->reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		regulator_disable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const struct spi_device_id ad5624r_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	{"ad5624r3", ID_AD5624R3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	{"ad5644r3", ID_AD5644R3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	{"ad5664r3", ID_AD5664R3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	{"ad5624r5", ID_AD5624R5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	{"ad5644r5", ID_AD5644R5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	{"ad5664r5", ID_AD5664R5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MODULE_DEVICE_TABLE(spi, ad5624r_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static struct spi_driver ad5624r_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		   .name = "ad5624r",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	.probe = ad5624r_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	.remove = ad5624r_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.id_table = ad5624r_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) module_spi_driver(ad5624r_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MODULE_DESCRIPTION("Analog Devices AD5624/44/64R DAC spi driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MODULE_LICENSE("GPL v2");