^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AD5592R Digital <-> Analog converters driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2015-2016 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Paul Cercueil <paul.cercueil@analog.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "ad5592r-base.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define AD5592R_GPIO_READBACK_EN BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define AD5592R_LDAC_READBACK_EN BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int ad5592r_spi_wnop_r16(struct ad5592r_state *st, __be16 *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct spi_transfer t = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .tx_buf = &st->spi_msg_nop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .rx_buf = buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .len = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) st->spi_msg_nop = 0; /* NOP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return spi_sync_transfer(spi, &t, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int ad5592r_write_dac(struct ad5592r_state *st, unsigned chan, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) st->spi_msg = cpu_to_be16(BIT(15) | (chan << 12) | value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return spi_write(spi, &st->spi_msg, sizeof(st->spi_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int ad5592r_read_adc(struct ad5592r_state *st, unsigned chan, u16 *value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) st->spi_msg = cpu_to_be16((AD5592R_REG_ADC_SEQ << 11) | BIT(chan));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ret = spi_write(spi, &st->spi_msg, sizeof(st->spi_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * Invalid data:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * See Figure 40. Single-Channel ADC Conversion Sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ret = ad5592r_spi_wnop_r16(st, &st->spi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = ad5592r_spi_wnop_r16(st, &st->spi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) *value = be16_to_cpu(st->spi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int ad5592r_reg_write(struct ad5592r_state *st, u8 reg, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) st->spi_msg = cpu_to_be16((reg << 11) | value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return spi_write(spi, &st->spi_msg, sizeof(st->spi_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int ad5592r_reg_read(struct ad5592r_state *st, u8 reg, u16 *value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) st->spi_msg = cpu_to_be16((AD5592R_REG_LDAC << 11) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) AD5592R_LDAC_READBACK_EN | (reg << 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ret = spi_write(spi, &st->spi_msg, sizeof(st->spi_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ret = ad5592r_spi_wnop_r16(st, &st->spi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *value = be16_to_cpu(st->spi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int ad5592r_gpio_read(struct ad5592r_state *st, u8 *value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = ad5592r_reg_write(st, AD5592R_REG_GPIO_IN_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) AD5592R_GPIO_READBACK_EN | st->gpio_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ret = ad5592r_spi_wnop_r16(st, &st->spi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) *value = (u8) be16_to_cpu(st->spi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const struct ad5592r_rw_ops ad5592r_rw_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .write_dac = ad5592r_write_dac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .read_adc = ad5592r_read_adc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .reg_write = ad5592r_reg_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .reg_read = ad5592r_reg_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .gpio_read = ad5592r_gpio_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int ad5592r_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) const struct spi_device_id *id = spi_get_device_id(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return ad5592r_probe(&spi->dev, id->name, &ad5592r_rw_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int ad5592r_spi_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return ad5592r_remove(&spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static const struct spi_device_id ad5592r_spi_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { .name = "ad5592r", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_DEVICE_TABLE(spi, ad5592r_spi_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const struct of_device_id ad5592r_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { .compatible = "adi,ad5592r", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MODULE_DEVICE_TABLE(of, ad5592r_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static const struct acpi_device_id ad5592r_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {"ADS5592", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MODULE_DEVICE_TABLE(acpi, ad5592r_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static struct spi_driver ad5592r_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .name = "ad5592r",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .of_match_table = ad5592r_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .acpi_match_table = ad5592r_acpi_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .probe = ad5592r_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .remove = ad5592r_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .id_table = ad5592r_spi_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) module_spi_driver(ad5592r_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MODULE_AUTHOR("Paul Cercueil <paul.cercueil@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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