^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AD5504, AD5501 High Voltage Digital to Analog Converter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2011 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/iio/events.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/iio/dac/ad5504.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AD5504_RES_MASK GENMASK(11, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AD5504_CMD_READ BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define AD5504_CMD_WRITE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AD5504_ADDR(addr) ((addr) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define AD5504_ADDR_NOOP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define AD5504_ADDR_DAC(x) ((x) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define AD5504_ADDR_ALL_DAC 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define AD5504_ADDR_CTRL 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define AD5504_DAC_PWR(ch) ((ch) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define AD5504_DAC_PWRDWN_MODE(mode) ((mode) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define AD5504_DAC_PWRDN_20K 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define AD5504_DAC_PWRDN_3STATE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * struct ad5446_state - driver instance specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @spi: spi_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @reg: supply regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * @vref_mv: actual reference voltage used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * @pwr_down_mask: power down mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * @pwr_down_mode: current power down mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * @data: transfer buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct ad5504_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct spi_device *spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct regulator *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned short vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned pwr_down_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned pwr_down_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) __be16 data[2] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * ad5504_supported_device_ids:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) enum ad5504_supported_device_ids {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ID_AD5504,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ID_AD5501,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int ad5504_spi_write(struct ad5504_state *st, u8 addr, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) st->data[0] = cpu_to_be16(AD5504_CMD_WRITE | AD5504_ADDR(addr) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) (val & AD5504_RES_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return spi_write(st->spi, &st->data[0], 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int ad5504_spi_read(struct ad5504_state *st, u8 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct spi_transfer t = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .tx_buf = &st->data[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .rx_buf = &st->data[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) st->data[0] = cpu_to_be16(AD5504_CMD_READ | AD5504_ADDR(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ret = spi_sync_transfer(st->spi, &t, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return be16_to_cpu(st->data[1]) & AD5504_RES_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static int ad5504_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) long m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct ad5504_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) switch (m) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = ad5504_spi_read(st, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) *val = st->vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) *val2 = chan->scan_type.realbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static int ad5504_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct ad5504_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (val >= (1 << chan->scan_type.realbits) || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return ad5504_spi_write(st, chan->address, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static const char * const ad5504_powerdown_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) "20kohm_to_gnd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) "three_state",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int ad5504_get_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) const struct iio_chan_spec *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct ad5504_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return st->pwr_down_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int ad5504_set_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) const struct iio_chan_spec *chan, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct ad5504_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) st->pwr_down_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static const struct iio_enum ad5504_powerdown_mode_enum = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .items = ad5504_powerdown_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .num_items = ARRAY_SIZE(ad5504_powerdown_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .get = ad5504_get_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .set = ad5504_set_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static ssize_t ad5504_read_dac_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) uintptr_t private, const struct iio_chan_spec *chan, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct ad5504_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) !(st->pwr_down_mask & (1 << chan->channel)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static ssize_t ad5504_write_dac_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) bool pwr_down;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct ad5504_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ret = strtobool(buf, &pwr_down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (pwr_down)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) st->pwr_down_mask &= ~(1 << chan->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) st->pwr_down_mask |= (1 << chan->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ret = ad5504_spi_write(st, AD5504_ADDR_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) AD5504_DAC_PWRDWN_MODE(st->pwr_down_mode) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) AD5504_DAC_PWR(st->pwr_down_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* writes to the CTRL register must be followed by a NOOP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ad5504_spi_write(st, AD5504_ADDR_NOOP, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return ret ? ret : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static IIO_CONST_ATTR(temp0_thresh_rising_value, "110000");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static IIO_CONST_ATTR(temp0_thresh_rising_en, "1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static struct attribute *ad5504_ev_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) &iio_const_attr_temp0_thresh_rising_value.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) &iio_const_attr_temp0_thresh_rising_en.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static const struct attribute_group ad5504_ev_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .attrs = ad5504_ev_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static irqreturn_t ad5504_event_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) iio_push_event(private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) IIO_UNMOD_EVENT_CODE(IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) IIO_EV_DIR_RISING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) iio_get_time_ns(private));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static const struct iio_info ad5504_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .write_raw = ad5504_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .read_raw = ad5504_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .event_attrs = &ad5504_ev_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const struct iio_chan_spec_ext_info ad5504_ext_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .name = "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .read = ad5504_read_dac_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .write = ad5504_write_dac_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .shared = IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) &ad5504_powerdown_mode_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) IIO_ENUM_AVAILABLE("powerdown_mode", &ad5504_powerdown_mode_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define AD5504_CHANNEL(_chan) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .type = IIO_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .output = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .channel = (_chan), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .address = AD5504_ADDR_DAC(_chan), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .sign = 'u', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .realbits = 12, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .storagebits = 16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .ext_info = ad5504_ext_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static const struct iio_chan_spec ad5504_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) AD5504_CHANNEL(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) AD5504_CHANNEL(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) AD5504_CHANNEL(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) AD5504_CHANNEL(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static int ad5504_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct ad5504_platform_data *pdata = spi->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct ad5504_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct regulator *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int ret, voltage_uv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) reg = devm_regulator_get(&spi->dev, "vcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (!IS_ERR(reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ret = regulator_enable(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ret = regulator_get_voltage(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) voltage_uv = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (voltage_uv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) st->vref_mv = voltage_uv / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) else if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) st->vref_mv = pdata->vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) dev_warn(&spi->dev, "reference voltage unspecified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) st->reg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) st->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) indio_dev->name = spi_get_device_id(st->spi)->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) indio_dev->info = &ad5504_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (spi_get_device_id(st->spi)->driver_data == ID_AD5501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) indio_dev->num_channels = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) indio_dev->num_channels = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) indio_dev->channels = ad5504_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (spi->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ret = devm_request_threaded_irq(&spi->dev, spi->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) &ad5504_event_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) spi_get_device_id(st->spi)->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) error_disable_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (!IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) regulator_disable(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static int ad5504_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) struct iio_dev *indio_dev = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct ad5504_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (!IS_ERR(st->reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) regulator_disable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static const struct spi_device_id ad5504_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {"ad5504", ID_AD5504},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {"ad5501", ID_AD5501},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) MODULE_DEVICE_TABLE(spi, ad5504_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static struct spi_driver ad5504_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .name = "ad5504",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .probe = ad5504_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .remove = ad5504_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .id_table = ad5504_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) module_spi_driver(ad5504_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MODULE_DESCRIPTION("Analog Devices AD5501/AD5501 DAC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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