^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AD5446 SPI DAC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2010 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MODE_PWRDWN_1k 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MODE_PWRDWN_100k 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MODE_PWRDWN_TRISTATE 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * struct ad5446_state - driver instance specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @dev: this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @chip_info: chip model specific constants, available modes etc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @reg: supply regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * @vref_mv: actual reference voltage used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @cached_val: store/retrieve values during power down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * @pwr_down_mode: power down mode (1k, 100k or tristate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @pwr_down: true if the device is in power down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * @lock: lock to protect the data buffer during write ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct ad5446_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) const struct ad5446_chip_info *chip_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct regulator *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned short vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) unsigned cached_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned pwr_down_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned pwr_down;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * struct ad5446_chip_info - chip specific information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @channel: channel spec for the DAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @int_vref_mv: AD5620/40/60: the internal reference voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @write: chip specific helper function to write to the register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct ad5446_chip_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct iio_chan_spec channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u16 int_vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int (*write)(struct ad5446_state *st, unsigned val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const char * const ad5446_powerdown_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) "1kohm_to_gnd", "100kohm_to_gnd", "three_state"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) const struct iio_chan_spec *chan, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct ad5446_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) st->pwr_down_mode = mode + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) const struct iio_chan_spec *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct ad5446_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return st->pwr_down_mode - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static const struct iio_enum ad5446_powerdown_mode_enum = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .items = ad5446_powerdown_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .num_items = ARRAY_SIZE(ad5446_powerdown_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .get = ad5446_get_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .set = ad5446_set_powerdown_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct ad5446_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return sprintf(buf, "%d\n", st->pwr_down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) uintptr_t private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) const struct iio_chan_spec *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct ad5446_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned int shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) bool powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ret = strtobool(buf, &powerdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) st->pwr_down = powerdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (st->pwr_down) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) shift = chan->scan_type.realbits + chan->scan_type.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) val = st->pwr_down_mode << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) val = st->cached_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ret = st->chip_info->write(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return ret ? ret : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .name = "powerdown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .read = ad5446_read_dac_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .write = ad5446_write_dac_powerdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .shared = IIO_SEPARATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .type = IIO_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .output = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .channel = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .sign = 'u', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .realbits = (bits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .storagebits = (storage), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .shift = (_shift), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .ext_info = (ext), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define AD5446_CHANNEL(bits, storage, shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) _AD5446_CHANNEL(bits, storage, shift, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int ad5446_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) long m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct ad5446_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) switch (m) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) *val = st->cached_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) *val = st->vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *val2 = chan->scan_type.realbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int ad5446_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct ad5446_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (val >= (1 << chan->scan_type.realbits) || val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) val <<= chan->scan_type.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) st->cached_val = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (!st->pwr_down)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = st->chip_info->write(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static const struct iio_info ad5446_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .read_raw = ad5446_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .write_raw = ad5446_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int ad5446_probe(struct device *dev, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) const struct ad5446_chip_info *chip_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct ad5446_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct regulator *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int ret, voltage_uv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) reg = devm_regulator_get(dev, "vcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (!IS_ERR(reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ret = regulator_enable(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ret = regulator_get_voltage(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) voltage_uv = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (indio_dev == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) st->chip_info = chip_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) dev_set_drvdata(dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) st->reg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) st->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) indio_dev->name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) indio_dev->info = &ad5446_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) indio_dev->channels = &st->chip_info->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) indio_dev->num_channels = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) mutex_init(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) st->pwr_down_mode = MODE_PWRDWN_1k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (st->chip_info->int_vref_mv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) st->vref_mv = st->chip_info->int_vref_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) else if (voltage_uv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) st->vref_mv = voltage_uv / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) dev_warn(dev, "reference voltage unspecified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) error_disable_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (!IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) regulator_disable(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int ad5446_remove(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct iio_dev *indio_dev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct ad5446_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (!IS_ERR(st->reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) regulator_disable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #if IS_ENABLED(CONFIG_SPI_MASTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static int ad5446_write(struct ad5446_state *st, unsigned val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct spi_device *spi = to_spi_device(st->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) __be16 data = cpu_to_be16(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return spi_write(spi, &data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static int ad5660_write(struct ad5446_state *st, unsigned val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct spi_device *spi = to_spi_device(st->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) uint8_t data[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) put_unaligned_be24(val, &data[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return spi_write(spi, data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * ad5446_supported_spi_device_ids:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * The AD5620/40/60 parts are available in different fixed internal reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * voltage options. The actual part numbers may look differently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * (and a bit cryptic), however this style is used to make clear which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * parts are supported here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) enum ad5446_supported_spi_device_ids {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ID_AD5300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ID_AD5310,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ID_AD5320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ID_AD5444,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ID_AD5446,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ID_AD5450,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ID_AD5451,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) ID_AD5541A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ID_AD5512A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ID_AD5553,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ID_AD5600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ID_AD5601,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) ID_AD5611,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) ID_AD5621,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ID_AD5641,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ID_AD5620_2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ID_AD5620_1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) ID_AD5640_2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) ID_AD5640_1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) ID_AD5660_2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ID_AD5660_1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ID_AD5662,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) [ID_AD5300] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) [ID_AD5310] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) [ID_AD5320] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) [ID_AD5444] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .channel = AD5446_CHANNEL(12, 16, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) [ID_AD5446] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .channel = AD5446_CHANNEL(14, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) [ID_AD5450] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .channel = AD5446_CHANNEL(8, 16, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) [ID_AD5451] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .channel = AD5446_CHANNEL(10, 16, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) [ID_AD5541A] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .channel = AD5446_CHANNEL(16, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) [ID_AD5512A] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .channel = AD5446_CHANNEL(12, 16, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) [ID_AD5553] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .channel = AD5446_CHANNEL(14, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) [ID_AD5600] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .channel = AD5446_CHANNEL(16, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) [ID_AD5601] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) [ID_AD5611] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) [ID_AD5621] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) [ID_AD5641] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) [ID_AD5620_2500] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .int_vref_mv = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) [ID_AD5620_1250] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .int_vref_mv = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) [ID_AD5640_2500] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .int_vref_mv = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) [ID_AD5640_1250] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .int_vref_mv = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .write = ad5446_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) [ID_AD5660_2500] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .int_vref_mv = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .write = ad5660_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) [ID_AD5660_1250] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .int_vref_mv = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .write = ad5660_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) [ID_AD5662] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .write = ad5660_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static const struct spi_device_id ad5446_spi_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {"ad5300", ID_AD5300},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {"ad5310", ID_AD5310},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {"ad5320", ID_AD5320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {"ad5444", ID_AD5444},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {"ad5446", ID_AD5446},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) {"ad5450", ID_AD5450},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {"ad5451", ID_AD5451},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {"ad5512a", ID_AD5512A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {"ad5541a", ID_AD5541A},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {"ad5553", ID_AD5553},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {"ad5600", ID_AD5600},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {"ad5601", ID_AD5601},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {"ad5611", ID_AD5611},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {"ad5621", ID_AD5621},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {"ad5641", ID_AD5641},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {"ad5640-2500", ID_AD5640_2500},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) {"ad5640-1250", ID_AD5640_1250},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) {"ad5660-2500", ID_AD5660_2500},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {"ad5660-1250", ID_AD5660_1250},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {"ad5662", ID_AD5662},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {"dac101s101", ID_AD5310},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {"dac121s101", ID_AD5320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {"dac7512", ID_AD5320},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static const struct of_device_id ad5446_of_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) { .compatible = "ti,dac7512" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) MODULE_DEVICE_TABLE(of, ad5446_of_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int ad5446_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) const struct spi_device_id *id = spi_get_device_id(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return ad5446_probe(&spi->dev, id->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) &ad5446_spi_chip_info[id->driver_data]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) static int ad5446_spi_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return ad5446_remove(&spi->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static struct spi_driver ad5446_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .name = "ad5446",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .of_match_table = ad5446_of_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .probe = ad5446_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .remove = ad5446_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .id_table = ad5446_spi_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static int __init ad5446_spi_register_driver(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return spi_register_driver(&ad5446_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static void ad5446_spi_unregister_driver(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) spi_unregister_driver(&ad5446_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static inline int ad5446_spi_register_driver(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static inline void ad5446_spi_unregister_driver(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) #if IS_ENABLED(CONFIG_I2C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static int ad5622_write(struct ad5446_state *st, unsigned val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct i2c_client *client = to_i2c_client(st->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) __be16 data = cpu_to_be16(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) ret = i2c_master_send(client, (char *)&data, sizeof(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (ret != sizeof(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * ad5446_supported_i2c_device_ids:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * The AD5620/40/60 parts are available in different fixed internal reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * voltage options. The actual part numbers may look differently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * (and a bit cryptic), however this style is used to make clear which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) * parts are supported here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) enum ad5446_supported_i2c_device_ids {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ID_AD5602,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ID_AD5612,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ID_AD5622,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) [ID_AD5602] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .write = ad5622_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) [ID_AD5612] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .write = ad5622_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) [ID_AD5622] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) .write = ad5622_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) static int ad5446_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return ad5446_probe(&i2c->dev, id->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) &ad5446_i2c_chip_info[id->driver_data]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static int ad5446_i2c_remove(struct i2c_client *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return ad5446_remove(&i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static const struct i2c_device_id ad5446_i2c_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {"ad5301", ID_AD5602},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {"ad5311", ID_AD5612},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {"ad5321", ID_AD5622},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {"ad5602", ID_AD5602},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {"ad5612", ID_AD5612},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) {"ad5622", ID_AD5622},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static struct i2c_driver ad5446_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) .name = "ad5446",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .probe = ad5446_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .remove = ad5446_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) .id_table = ad5446_i2c_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static int __init ad5446_i2c_register_driver(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return i2c_add_driver(&ad5446_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static void __exit ad5446_i2c_unregister_driver(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) i2c_del_driver(&ad5446_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static inline int ad5446_i2c_register_driver(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static inline void ad5446_i2c_unregister_driver(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static int __init ad5446_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) ret = ad5446_spi_register_driver();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) ret = ad5446_i2c_register_driver();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) ad5446_spi_unregister_driver();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) module_init(ad5446_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static void __exit ad5446_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) ad5446_i2c_unregister_driver();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) ad5446_spi_unregister_driver();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) module_exit(ad5446_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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