^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * BME680 - SPI Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018 Himanshu Jha <himanshujha199640@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "bme680.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct bme680_spi_bus_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct spi_device *spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u8 current_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * In SPI mode there are only 7 address bits, a "page" register determines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * which part of the 8-bit range is active. This function looks at the address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * and writes the page selection bit if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static int bme680_regmap_spi_select_page(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct bme680_spi_bus_context *ctx, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct spi_device *spi = ctx->spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u8 page = (reg & 0x80) ? 0 : 1; /* Page "1" is low range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (page == ctx->current_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Data sheet claims we're only allowed to change bit 4, so we must do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * a read-modify-write on each and every page select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) buf[0] = BME680_REG_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ret = spi_write_then_read(spi, buf, 1, buf + 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) dev_err(&spi->dev, "failed to set page %u\n", page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) buf[0] = BME680_REG_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) buf[1] |= BME680_SPI_MEM_PAGE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) buf[1] &= ~BME680_SPI_MEM_PAGE_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ret = spi_write(spi, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) dev_err(&spi->dev, "failed to set page %u\n", page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ctx->current_page = page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int bme680_regmap_spi_write(void *context, const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct bme680_spi_bus_context *ctx = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct spi_device *spi = ctx->spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) memcpy(buf, data, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ret = bme680_regmap_spi_select_page(ctx, buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * The SPI register address (= full register address without bit 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * and the write command (bit7 = RW = '0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) buf[0] &= ~0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return spi_write(spi, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int bme680_regmap_spi_read(void *context, const void *reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) size_t reg_size, void *val, size_t val_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct bme680_spi_bus_context *ctx = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct spi_device *spi = ctx->spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u8 addr = *(const u8 *)reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ret = bme680_regmap_spi_select_page(ctx, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) addr |= 0x80; /* bit7 = RW = '1' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return spi_write_then_read(spi, &addr, 1, val, val_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct regmap_bus bme680_regmap_bus = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .write = bme680_regmap_spi_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .read = bme680_regmap_spi_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .reg_format_endian_default = REGMAP_ENDIAN_BIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .val_format_endian_default = REGMAP_ENDIAN_BIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int bme680_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) const struct spi_device_id *id = spi_get_device_id(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct bme680_spi_bus_context *bus_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) spi->bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_err(&spi->dev, "spi_setup failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) bus_context = devm_kzalloc(&spi->dev, sizeof(*bus_context), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!bus_context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) bus_context->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) bus_context->current_page = 0xff; /* Undefined on warm boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) regmap = devm_regmap_init(&spi->dev, &bme680_regmap_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) bus_context, &bme680_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_err(&spi->dev, "Failed to register spi regmap %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) (int)PTR_ERR(regmap));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return bme680_core_probe(&spi->dev, regmap, id->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static const struct spi_device_id bme680_spi_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {"bme680", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) MODULE_DEVICE_TABLE(spi, bme680_spi_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static const struct acpi_device_id bme680_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {"BME0680", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MODULE_DEVICE_TABLE(acpi, bme680_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct of_device_id bme680_of_spi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { .compatible = "bosch,bme680", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_DEVICE_TABLE(of, bme680_of_spi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static struct spi_driver bme680_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .name = "bme680_spi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .acpi_match_table = ACPI_PTR(bme680_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .of_match_table = bme680_of_spi_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .probe = bme680_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .id_table = bme680_spi_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) module_spi_driver(bme680_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MODULE_AUTHOR("Himanshu Jha <himanshujha199640@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MODULE_DESCRIPTION("Bosch BME680 SPI driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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