^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * atlas-sensor.c - Support for Atlas Scientific OEM SM sensors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015-2019 Konsulko Group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Matt Ranostay <matt.ranostay@konsulko.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/irq_work.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/iio/trigger.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/iio/trigger_consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ATLAS_REGMAP_NAME "atlas_regmap"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ATLAS_DRV_NAME "atlas"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ATLAS_REG_DEV_TYPE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define ATLAS_REG_DEV_VERSION 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ATLAS_REG_INT_CONTROL 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define ATLAS_REG_INT_CONTROL_EN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ATLAS_REG_PWR_CONTROL 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ATLAS_REG_PH_CALIB_STATUS 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define ATLAS_REG_PH_CALIB_STATUS_MASK 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define ATLAS_REG_PH_CALIB_STATUS_LOW BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define ATLAS_REG_PH_CALIB_STATUS_MID BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ATLAS_REG_PH_CALIB_STATUS_HIGH BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define ATLAS_REG_EC_CALIB_STATUS 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define ATLAS_REG_EC_CALIB_STATUS_MASK 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define ATLAS_REG_EC_CALIB_STATUS_DRY BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ATLAS_REG_EC_CALIB_STATUS_SINGLE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define ATLAS_REG_EC_CALIB_STATUS_LOW BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ATLAS_REG_EC_CALIB_STATUS_HIGH BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ATLAS_REG_DO_CALIB_STATUS 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define ATLAS_REG_DO_CALIB_STATUS_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define ATLAS_REG_DO_CALIB_STATUS_PRESSURE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define ATLAS_REG_DO_CALIB_STATUS_DO BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define ATLAS_REG_RTD_DATA 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define ATLAS_REG_PH_TEMP_DATA 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define ATLAS_REG_PH_DATA 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define ATLAS_REG_EC_PROBE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define ATLAS_REG_EC_TEMP_DATA 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define ATLAS_REG_EC_DATA 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define ATLAS_REG_TDS_DATA 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define ATLAS_REG_PSS_DATA 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define ATLAS_REG_ORP_CALIB_STATUS 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define ATLAS_REG_ORP_DATA 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define ATLAS_REG_DO_TEMP_DATA 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define ATLAS_REG_DO_DATA 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define ATLAS_PH_INT_TIME_IN_MS 450
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define ATLAS_EC_INT_TIME_IN_MS 650
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define ATLAS_ORP_INT_TIME_IN_MS 450
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define ATLAS_DO_INT_TIME_IN_MS 450
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define ATLAS_RTD_INT_TIME_IN_MS 450
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ATLAS_PH_SM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ATLAS_EC_SM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ATLAS_ORP_SM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ATLAS_DO_SM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ATLAS_RTD_SM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct atlas_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct iio_trigger *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct atlas_device *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct irq_work work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int interrupt_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* 96-bit data + 32-bit pad + 64-bit timestamp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) __be32 buffer[6] __aligned(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static const struct regmap_config atlas_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = ATLAS_REGMAP_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int atlas_buffer_num_channels(const struct iio_chan_spec *spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) for (; spec->type != IIO_TIMESTAMP; spec++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const struct iio_chan_spec atlas_ph_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .type = IIO_PH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .address = ATLAS_REG_PH_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .sign = 'u',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .realbits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .storagebits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .endianness = IIO_BE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) IIO_CHAN_SOFT_TIMESTAMP(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .address = ATLAS_REG_PH_TEMP_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .output = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .scan_index = -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define ATLAS_CONCENTRATION_CHANNEL(_idx, _addr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .type = IIO_CONCENTRATION, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .channel = _idx, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .address = _addr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .info_mask_separate = \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .scan_index = _idx + 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .sign = 'u', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .realbits = 32, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .storagebits = 32, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .endianness = IIO_BE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static const struct iio_chan_spec atlas_ec_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .type = IIO_ELECTRICALCONDUCTIVITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .address = ATLAS_REG_EC_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .sign = 'u',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .realbits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .storagebits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .endianness = IIO_BE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ATLAS_CONCENTRATION_CHANNEL(0, ATLAS_REG_TDS_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ATLAS_CONCENTRATION_CHANNEL(1, ATLAS_REG_PSS_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) IIO_CHAN_SOFT_TIMESTAMP(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .address = ATLAS_REG_EC_TEMP_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .output = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .scan_index = -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static const struct iio_chan_spec atlas_orp_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .type = IIO_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .address = ATLAS_REG_ORP_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .sign = 's',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .realbits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .storagebits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .endianness = IIO_BE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) IIO_CHAN_SOFT_TIMESTAMP(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct iio_chan_spec atlas_do_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .type = IIO_CONCENTRATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .address = ATLAS_REG_DO_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .sign = 'u',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .realbits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .storagebits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .endianness = IIO_BE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) IIO_CHAN_SOFT_TIMESTAMP(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .address = ATLAS_REG_DO_TEMP_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .output = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .scan_index = -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const struct iio_chan_spec atlas_rtd_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .type = IIO_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .address = ATLAS_REG_RTD_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .sign = 's',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .realbits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .storagebits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .endianness = IIO_BE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) IIO_CHAN_SOFT_TIMESTAMP(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int atlas_check_ph_calibration(struct atlas_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct device *dev = &data->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = regmap_read(data->regmap, ATLAS_REG_PH_CALIB_STATUS, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (!(val & ATLAS_REG_PH_CALIB_STATUS_MASK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) dev_warn(dev, "device has not been calibrated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (!(val & ATLAS_REG_PH_CALIB_STATUS_LOW))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) dev_warn(dev, "device missing low point calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (!(val & ATLAS_REG_PH_CALIB_STATUS_MID))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) dev_warn(dev, "device missing mid point calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (!(val & ATLAS_REG_PH_CALIB_STATUS_HIGH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) dev_warn(dev, "device missing high point calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int atlas_check_ec_calibration(struct atlas_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct device *dev = &data->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) __be16 rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ret = regmap_bulk_read(data->regmap, ATLAS_REG_EC_PROBE, &rval, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) val = be16_to_cpu(rval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dev_info(dev, "probe set to K = %d.%.2d", val / 100, val % 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ret = regmap_read(data->regmap, ATLAS_REG_EC_CALIB_STATUS, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (!(val & ATLAS_REG_EC_CALIB_STATUS_MASK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) dev_warn(dev, "device has not been calibrated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (!(val & ATLAS_REG_EC_CALIB_STATUS_DRY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) dev_warn(dev, "device missing dry point calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (val & ATLAS_REG_EC_CALIB_STATUS_SINGLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) dev_warn(dev, "device using single point calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (!(val & ATLAS_REG_EC_CALIB_STATUS_LOW))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) dev_warn(dev, "device missing low point calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (!(val & ATLAS_REG_EC_CALIB_STATUS_HIGH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) dev_warn(dev, "device missing high point calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int atlas_check_orp_calibration(struct atlas_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct device *dev = &data->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ret = regmap_read(data->regmap, ATLAS_REG_ORP_CALIB_STATUS, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (!val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) dev_warn(dev, "device has not been calibrated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static int atlas_check_do_calibration(struct atlas_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct device *dev = &data->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ret = regmap_read(data->regmap, ATLAS_REG_DO_CALIB_STATUS, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (!(val & ATLAS_REG_DO_CALIB_STATUS_MASK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) dev_warn(dev, "device has not been calibrated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (!(val & ATLAS_REG_DO_CALIB_STATUS_PRESSURE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) dev_warn(dev, "device missing atmospheric pressure calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (!(val & ATLAS_REG_DO_CALIB_STATUS_DO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) dev_warn(dev, "device missing dissolved oxygen calibration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct atlas_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) const struct iio_chan_spec *channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) int data_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int (*calibration)(struct atlas_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) int delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static struct atlas_device atlas_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) [ATLAS_PH_SM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .channels = atlas_ph_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .num_channels = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .data_reg = ATLAS_REG_PH_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .calibration = &atlas_check_ph_calibration,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .delay = ATLAS_PH_INT_TIME_IN_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) [ATLAS_EC_SM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .channels = atlas_ec_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .num_channels = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .data_reg = ATLAS_REG_EC_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .calibration = &atlas_check_ec_calibration,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .delay = ATLAS_EC_INT_TIME_IN_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) [ATLAS_ORP_SM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .channels = atlas_orp_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .num_channels = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .data_reg = ATLAS_REG_ORP_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .calibration = &atlas_check_orp_calibration,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .delay = ATLAS_ORP_INT_TIME_IN_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) [ATLAS_DO_SM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .channels = atlas_do_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .num_channels = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .data_reg = ATLAS_REG_DO_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .calibration = &atlas_check_do_calibration,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .delay = ATLAS_DO_INT_TIME_IN_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) [ATLAS_RTD_SM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .channels = atlas_rtd_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .num_channels = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .data_reg = ATLAS_REG_RTD_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .delay = ATLAS_RTD_INT_TIME_IN_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static int atlas_set_powermode(struct atlas_data *data, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return regmap_write(data->regmap, ATLAS_REG_PWR_CONTROL, on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static int atlas_set_interrupt(struct atlas_data *data, bool state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (!data->interrupt_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return regmap_update_bits(data->regmap, ATLAS_REG_INT_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ATLAS_REG_INT_CONTROL_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) state ? ATLAS_REG_INT_CONTROL_EN : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int atlas_buffer_postenable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct atlas_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) ret = pm_runtime_get_sync(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) pm_runtime_put_noidle(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return atlas_set_interrupt(data, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static int atlas_buffer_predisable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct atlas_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) ret = atlas_set_interrupt(data, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) pm_runtime_mark_last_busy(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ret = pm_runtime_put_autosuspend(&data->client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static const struct iio_trigger_ops atlas_interrupt_trigger_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static const struct iio_buffer_setup_ops atlas_buffer_setup_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .postenable = atlas_buffer_postenable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .predisable = atlas_buffer_predisable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static void atlas_work_handler(struct irq_work *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct atlas_data *data = container_of(work, struct atlas_data, work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) iio_trigger_poll(data->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static irqreturn_t atlas_trigger_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct iio_poll_func *pf = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) struct iio_dev *indio_dev = pf->indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) struct atlas_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) int channels = atlas_buffer_num_channels(data->chip->channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) ret = regmap_bulk_read(data->regmap, data->chip->data_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) &data->buffer, sizeof(__be32) * channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) iio_get_time_ns(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) iio_trigger_notify_done(indio_dev->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static irqreturn_t atlas_interrupt_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) struct iio_dev *indio_dev = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) struct atlas_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) irq_work_queue(&data->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static int atlas_read_measurement(struct atlas_data *data, int reg, __be32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct device *dev = &data->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int suspended = pm_runtime_suspended(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ret = pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) pm_runtime_put_noidle(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (suspended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) msleep(data->chip->delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) ret = regmap_bulk_read(data->regmap, reg, val, sizeof(*val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) pm_runtime_mark_last_busy(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) pm_runtime_put_autosuspend(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static int atlas_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) struct atlas_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) case IIO_CHAN_INFO_PROCESSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) case IIO_CHAN_INFO_RAW: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) __be32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) ret = regmap_bulk_read(data->regmap, chan->address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ®, sizeof(reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) case IIO_PH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) case IIO_CONCENTRATION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) case IIO_ELECTRICALCONDUCTIVITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) case IIO_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) ret = iio_device_claim_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) ret = atlas_read_measurement(data, chan->address, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) iio_device_release_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) *val = be32_to_cpu(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) *val = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) case IIO_PH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) *val = 1; /* 0.001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) *val2 = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) case IIO_ELECTRICALCONDUCTIVITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) *val = 1; /* 0.00001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) *val2 = 100000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) case IIO_CONCENTRATION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) *val = 0; /* 0.000000001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) *val2 = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return IIO_VAL_INT_PLUS_NANO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) case IIO_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) *val = 1; /* 0.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) *val2 = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static int atlas_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) struct atlas_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) __be32 reg = cpu_to_be32(val / 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (val2 != 0 || val < 0 || val > 20000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (mask != IIO_CHAN_INFO_RAW || chan->type != IIO_TEMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return regmap_bulk_write(data->regmap, chan->address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ®, sizeof(reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static const struct iio_info atlas_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) .read_raw = atlas_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .write_raw = atlas_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static const struct i2c_device_id atlas_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) { "atlas-ph-sm", ATLAS_PH_SM},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) { "atlas-ec-sm", ATLAS_EC_SM},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) { "atlas-orp-sm", ATLAS_ORP_SM},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) { "atlas-do-sm", ATLAS_DO_SM},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) { "atlas-rtd-sm", ATLAS_RTD_SM},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) MODULE_DEVICE_TABLE(i2c, atlas_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) static const struct of_device_id atlas_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) { .compatible = "atlas,ph-sm", .data = (void *)ATLAS_PH_SM, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) { .compatible = "atlas,ec-sm", .data = (void *)ATLAS_EC_SM, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) { .compatible = "atlas,orp-sm", .data = (void *)ATLAS_ORP_SM, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) { .compatible = "atlas,do-sm", .data = (void *)ATLAS_DO_SM, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) { .compatible = "atlas,rtd-sm", .data = (void *)ATLAS_RTD_SM, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) MODULE_DEVICE_TABLE(of, atlas_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static int atlas_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct atlas_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) struct atlas_device *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) struct iio_trigger *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (!dev_fwnode(&client->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) chip = &atlas_devices[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) chip = &atlas_devices[(unsigned long)device_get_match_data(&client->dev)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) indio_dev->info = &atlas_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) indio_dev->name = ATLAS_DRV_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) indio_dev->channels = chip->channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) indio_dev->num_channels = chip->num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) indio_dev->modes = INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) trig = devm_iio_trigger_alloc(&client->dev, "%s-dev%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) indio_dev->name, indio_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (!trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) data->trig = trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) data->chip = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) trig->dev.parent = indio_dev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) trig->ops = &atlas_interrupt_trigger_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) iio_trigger_set_drvdata(trig, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) data->regmap = devm_regmap_init_i2c(client, &atlas_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (IS_ERR(data->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) dev_err(&client->dev, "regmap initialization failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return PTR_ERR(data->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) ret = pm_runtime_set_active(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) ret = chip->calibration(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) ret = iio_trigger_register(trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dev_err(&client->dev, "failed to register trigger\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) &atlas_trigger_handler, &atlas_buffer_setup_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) dev_err(&client->dev, "cannot setup iio trigger\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) goto unregister_trigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) init_irq_work(&data->work, atlas_work_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (client->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* interrupt pin toggles on new conversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) ret = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) NULL, atlas_interrupt_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) IRQF_TRIGGER_RISING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) "atlas_irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) "request irq (%d) failed\n", client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) data->interrupt_enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) ret = atlas_set_powermode(data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) dev_err(&client->dev, "cannot power device on");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) goto unregister_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) pm_runtime_enable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) pm_runtime_set_autosuspend_delay(&client->dev, 2500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) pm_runtime_use_autosuspend(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev_err(&client->dev, "unable to register device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) goto unregister_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) unregister_pm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) atlas_set_powermode(data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) unregister_buffer:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) unregister_trigger:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) iio_trigger_unregister(data->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) static int atlas_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) struct iio_dev *indio_dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) struct atlas_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) iio_trigger_unregister(data->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) pm_runtime_disable(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) pm_runtime_set_suspended(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) pm_runtime_put_noidle(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) return atlas_set_powermode(data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static int atlas_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) struct atlas_data *data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return atlas_set_powermode(data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) static int atlas_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) struct atlas_data *data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) return atlas_set_powermode(data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) static const struct dev_pm_ops atlas_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) SET_RUNTIME_PM_OPS(atlas_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) atlas_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) static struct i2c_driver atlas_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) .name = ATLAS_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .of_match_table = atlas_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .pm = &atlas_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) .probe = atlas_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .remove = atlas_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .id_table = atlas_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) module_i2c_driver(atlas_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) MODULE_DESCRIPTION("Atlas Scientific SM sensors");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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