Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * HMC425A and similar Gain Amplifiers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2020 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) enum hmc425a_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	ID_HMC425A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) struct hmc425a_chip_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	const char			*name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	const struct iio_chan_spec	*channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	unsigned int			num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	unsigned int			num_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	int				gain_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	int				gain_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	int				default_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) struct hmc425a_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct	regulator *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct	mutex lock; /* protect sensor state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct	hmc425a_chip_info *chip_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct	gpio_descs *gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	enum	hmc425a_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	u32	gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int hmc425a_write(struct iio_dev *indio_dev, u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct hmc425a_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	DECLARE_BITMAP(values, BITS_PER_TYPE(value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	values[0] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	gpiod_set_array_value_cansleep(st->gpios->ndescs, st->gpios->desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 				       NULL, values);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static int hmc425a_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			    struct iio_chan_spec const *chan, int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			    int *val2, long m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct hmc425a_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	int code, gain = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	switch (m) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		code = st->gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		switch (st->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		case ID_HMC425A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			gain = ~code * -500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		*val = gain / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		*val2 = (gain % 1000) * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		ret = IIO_VAL_INT_PLUS_MICRO_DB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static int hmc425a_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			     struct iio_chan_spec const *chan, int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			     int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct hmc425a_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct hmc425a_chip_info *inf = st->chip_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int code = 0, gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		gain = (val * 1000) - (val2 / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		gain = (val * 1000) + (val2 / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	if (gain > inf->gain_max || gain < inf->gain_min)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	switch (st->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	case ID_HMC425A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		code = ~((abs(gain) / 500) & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		st->gain = code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		ret = hmc425a_write(indio_dev, st->gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int hmc425a_write_raw_get_fmt(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				     struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 				     long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		return IIO_VAL_INT_PLUS_MICRO_DB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static const struct iio_info hmc425a_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.read_raw = &hmc425a_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.write_raw = &hmc425a_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	.write_raw_get_fmt = &hmc425a_write_raw_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define HMC425A_CHAN(_channel)						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	.type = IIO_VOLTAGE,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	.output = 1,							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	.indexed = 1,							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.channel = _channel,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	.info_mask_separate = BIT(IIO_CHAN_INFO_HARDWAREGAIN),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static const struct iio_chan_spec hmc425a_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	HMC425A_CHAN(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* Match table for of_platform binding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const struct of_device_id hmc425a_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	{ .compatible = "adi,hmc425a", .data = (void *)ID_HMC425A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MODULE_DEVICE_TABLE(of, hmc425a_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static void hmc425a_reg_disable(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct hmc425a_state *st = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	regulator_disable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static struct hmc425a_chip_info hmc425a_chip_info_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	[ID_HMC425A] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		.name = "hmc425a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		.channels = hmc425a_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		.num_channels = ARRAY_SIZE(hmc425a_channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		.num_gpios = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		.gain_min = -31500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		.gain_max = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		.default_gain = -0x40, /* set default gain -31.5db*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int hmc425a_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	struct hmc425a_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	st->type = (enum hmc425a_type)of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	st->chip_info = &hmc425a_chip_info_tbl[st->type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	indio_dev->num_channels = st->chip_info->num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	indio_dev->channels = st->chip_info->channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	indio_dev->name = st->chip_info->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	st->gain = st->chip_info->default_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	st->gpios = devm_gpiod_get_array(&pdev->dev, "ctrl", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	if (IS_ERR(st->gpios))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		return dev_err_probe(&pdev->dev, PTR_ERR(st->gpios),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 				     "failed to get gpios\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (st->gpios->ndescs != st->chip_info->num_gpios) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		dev_err(&pdev->dev, "%d GPIOs needed to operate\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			st->chip_info->num_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	st->reg = devm_regulator_get(&pdev->dev, "vcc-supply");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (IS_ERR(st->reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		return PTR_ERR(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	ret = regulator_enable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	ret = devm_add_action_or_reset(&pdev->dev, hmc425a_reg_disable, st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	mutex_init(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	indio_dev->info = &hmc425a_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	return devm_iio_device_register(&pdev->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static struct platform_driver hmc425a_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		.name = KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		.of_match_table = hmc425a_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	.probe = hmc425a_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) module_platform_driver(hmc425a_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_DESCRIPTION("Analog Devices HMC425A and similar GPIO control Gain Amplifiers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_LICENSE("GPL v2");