Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * AD8366 and similar Gain Amplifiers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * This driver supports the following gain amplifiers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *   AD8366 Dual-Digital Variable Gain Amplifier (VGA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *   ADA4961 BiCMOS RF Digital Gain Amplifier (DGA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *   ADL5240 Digitally controlled variable gain amplifier (VGA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *   HMC1119 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright 2012-2019 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/bitrev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) enum ad8366_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	ID_AD8366,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	ID_ADA4961,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	ID_ADL5240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	ID_HMC1119,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) struct ad8366_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	int gain_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	int gain_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) struct ad8366_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct spi_device	*spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct regulator	*reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct mutex            lock; /* protect sensor state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct gpio_desc	*reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	unsigned char		ch[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	enum ad8366_type	type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct ad8366_info	*info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	 * DMA (thus cache coherency maintenance) requires the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	 * transfer buffers to live in their own cache lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	unsigned char		data[2] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static struct ad8366_info ad8366_infos[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	[ID_AD8366] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.gain_min = 4500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.gain_max = 20500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	[ID_ADA4961] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.gain_min = -6000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		.gain_max = 15000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	[ID_ADL5240] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		.gain_min = -11500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		.gain_max = 20000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	[ID_HMC1119] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		.gain_min = -31750,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.gain_max = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static int ad8366_write(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			unsigned char ch_a, unsigned char ch_b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct ad8366_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	switch (st->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	case ID_AD8366:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		ch_a = bitrev8(ch_a & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		ch_b = bitrev8(ch_b & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		st->data[0] = ch_b >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		st->data[1] = (ch_b << 4) | (ch_a >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	case ID_ADA4961:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		st->data[0] = ch_a & 0x1F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	case ID_ADL5240:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		st->data[0] = (ch_a & 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	case ID_HMC1119:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		st->data[0] = ch_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	ret = spi_write(st->spi, st->data, indio_dev->num_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		dev_err(&indio_dev->dev, "write failed (%d)", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static int ad8366_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			   int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			   int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			   long m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct ad8366_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	int code, gain = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	switch (m) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		code = st->ch[chan->channel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		switch (st->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		case ID_AD8366:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			gain = code * 253 + 4500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		case ID_ADA4961:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			gain = 15000 - code * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		case ID_ADL5240:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			gain = 20000 - 31500 + code * 500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		case ID_HMC1119:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			gain = -1 * code * 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		/* Values in dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		*val = gain / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		*val2 = (gain % 1000) * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		ret = IIO_VAL_INT_PLUS_MICRO_DB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int ad8366_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			    int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			    int val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			    long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct ad8366_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct ad8366_info *inf = st->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	int code = 0, gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	/* Values in dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		gain = (val * 1000) - (val2 / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		gain = (val * 1000) + (val2 / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (gain > inf->gain_max || gain < inf->gain_min)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	switch (st->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	case ID_AD8366:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		code = (gain - 4500) / 253;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	case ID_ADA4961:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		code = (15000 - gain) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	case ID_ADL5240:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		code = ((gain - 500 - 20000) / 500) & 0x3F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	case ID_HMC1119:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		code = (abs(gain) / 250) & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		st->ch[chan->channel] = code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		ret = ad8366_write(indio_dev, st->ch[0], st->ch[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int ad8366_write_raw_get_fmt(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 				    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 				    long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	case IIO_CHAN_INFO_HARDWAREGAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		return IIO_VAL_INT_PLUS_MICRO_DB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const struct iio_info ad8366_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.read_raw = &ad8366_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.write_raw = &ad8366_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.write_raw_get_fmt = &ad8366_write_raw_get_fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define AD8366_CHAN(_channel) {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	.type = IIO_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	.output = 1,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	.indexed = 1,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	.channel = _channel,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	.info_mask_separate = BIT(IIO_CHAN_INFO_HARDWAREGAIN),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static const struct iio_chan_spec ad8366_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	AD8366_CHAN(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	AD8366_CHAN(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static const struct iio_chan_spec ada4961_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	AD8366_CHAN(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int ad8366_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	struct ad8366_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	if (indio_dev == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	st->reg = devm_regulator_get(&spi->dev, "vcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (!IS_ERR(st->reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		ret = regulator_enable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	mutex_init(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	st->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	st->type = spi_get_device_id(spi)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	switch (st->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	case ID_AD8366:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		indio_dev->channels = ad8366_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		indio_dev->num_channels = ARRAY_SIZE(ad8366_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	case ID_ADA4961:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	case ID_ADL5240:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	case ID_HMC1119:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		st->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		if (IS_ERR(st->reset_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			ret = PTR_ERR(st->reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		indio_dev->channels = ada4961_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		indio_dev->num_channels = ARRAY_SIZE(ada4961_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		dev_err(&spi->dev, "Invalid device ID\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	st->info = &ad8366_infos[st->type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	indio_dev->name = spi_get_device_id(spi)->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	indio_dev->info = &ad8366_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	ret = ad8366_write(indio_dev, 0 , 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		goto error_disable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) error_disable_reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	if (!IS_ERR(st->reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		regulator_disable(st->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int ad8366_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	struct ad8366_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	struct regulator *reg = st->reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	if (!IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		regulator_disable(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static const struct spi_device_id ad8366_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	{"ad8366",  ID_AD8366},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	{"ada4961", ID_ADA4961},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	{"adl5240", ID_ADL5240},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	{"hmc1119", ID_HMC1119},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MODULE_DEVICE_TABLE(spi, ad8366_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static struct spi_driver ad8366_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		.name	= KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	.probe		= ad8366_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	.remove		= ad8366_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	.id_table	= ad8366_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) module_spi_driver(ad8366_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) MODULE_DESCRIPTION("Analog Devices AD8366 and similar Gain Amplifiers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MODULE_LICENSE("GPL v2");