Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ti-adc161s626.c - Texas Instruments ADC161S626 1-channel differential ADC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * ADC Devices Supported:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  adc141s626 - 14-bit ADC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *  adc161s626 - 16-bit ADC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 2016-2018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Author: Matt Ranostay <matt.ranostay@konsulko.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/iio/trigger.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/iio/trigger_consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define TI_ADC_DRV_NAME	"ti-adc161s626"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	TI_ADC141S626,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	TI_ADC161S626,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static const struct iio_chan_spec ti_adc141s626_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		.type = IIO_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		.channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 				      BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 				      BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		.scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		.scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 			.sign = 's',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 			.realbits = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 			.storagebits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	IIO_CHAN_SOFT_TIMESTAMP(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static const struct iio_chan_spec ti_adc161s626_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		.type = IIO_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		.channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 				      BIT(IIO_CHAN_INFO_SCALE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 				      BIT(IIO_CHAN_INFO_OFFSET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.scan_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			.sign = 's',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			.realbits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 			.storagebits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	IIO_CHAN_SOFT_TIMESTAMP(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) struct ti_adc_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct spi_device *spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct regulator *ref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u8 read_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u8 shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	u8 buffer[16] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static int ti_adc_read_measurement(struct ti_adc_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 				   struct iio_chan_spec const *chan, int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	switch (data->read_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	case 2: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		__be16 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		ret = spi_read(data->spi, (void *) &buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		*val = be16_to_cpu(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	case 3: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		__be32 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		ret = spi_read(data->spi, (void *) &buf, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		*val = be32_to_cpu(buf) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	*val = sign_extend32(*val >> data->shift, chan->scan_type.realbits - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static irqreturn_t ti_adc_trigger_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	struct iio_poll_func *pf = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct iio_dev *indio_dev = pf->indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct ti_adc_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	ret = ti_adc_read_measurement(data, &indio_dev->channels[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 				     (int *) &data->buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		iio_push_to_buffers_with_timestamp(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 					data->buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 					iio_get_time_ns(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	iio_trigger_notify_done(indio_dev->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int ti_adc_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			   int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	struct ti_adc_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		ret = iio_device_claim_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		ret = ti_adc_read_measurement(data, chan, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		iio_device_release_direct_mode(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		ret = regulator_get_voltage(data->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		*val = ret / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		*val2 = chan->scan_type.realbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	case IIO_CHAN_INFO_OFFSET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		*val = 1 << (chan->scan_type.realbits - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const struct iio_info ti_adc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.read_raw = ti_adc_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static int ti_adc_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct ti_adc_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	indio_dev->info = &ti_adc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	indio_dev->name = TI_ADC_DRV_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	data->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	switch (spi_get_device_id(spi)->driver_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	case TI_ADC141S626:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		indio_dev->channels = ti_adc141s626_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		indio_dev->num_channels = ARRAY_SIZE(ti_adc141s626_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		data->shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		data->read_size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	case TI_ADC161S626:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		indio_dev->channels = ti_adc161s626_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		indio_dev->num_channels = ARRAY_SIZE(ti_adc161s626_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		data->shift = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		data->read_size = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	data->ref = devm_regulator_get(&spi->dev, "vdda");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	if (!IS_ERR(data->ref)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		ret = regulator_enable(data->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 					 ti_adc_trigger_handler, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		goto error_regulator_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		goto error_unreg_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) error_unreg_buffer:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) error_regulator_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	regulator_disable(data->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static int ti_adc_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	struct ti_adc_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	regulator_disable(data->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static const struct of_device_id ti_adc_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	{ .compatible = "ti,adc141s626", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	{ .compatible = "ti,adc161s626", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static const struct spi_device_id ti_adc_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	{"adc141s626", TI_ADC141S626},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	{"adc161s626", TI_ADC161S626},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MODULE_DEVICE_TABLE(spi, ti_adc_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static struct spi_driver ti_adc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		.name	= TI_ADC_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		.of_match_table = ti_adc_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	.probe		= ti_adc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	.remove		= ti_adc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	.id_table	= ti_adc_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) module_spi_driver(ti_adc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MODULE_DESCRIPTION("Texas Instruments ADC1x1S 1-channel differential ADC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MODULE_LICENSE("GPL");