Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * TI ADC081C/ADC101C/ADC121C 8/10/12-bit ADC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2012 Avionic Design GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2016 Intel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Datasheets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *	https://www.ti.com/lit/ds/symlink/adc081c021.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *	https://www.ti.com/lit/ds/symlink/adc101c021.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *	https://www.ti.com/lit/ds/symlink/adc121c021.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * The devices have a very similar interface and differ mostly in the number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * bits handled. For the 8-bit and 10-bit models the least-significant 4 or 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * bits of value registers are reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/iio/trigger_consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) struct adc081c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	struct regulator *ref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	/* 8, 10 or 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	int bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	/* Ensure natural alignment of buffer elements */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		u16 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		s64 ts __aligned(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	} scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define REG_CONV_RES 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static int adc081c_read_raw(struct iio_dev *iio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			    struct iio_chan_spec const *channel, int *value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 			    int *shift, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct adc081c *adc = iio_priv(iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		err = i2c_smbus_read_word_swapped(adc->i2c, REG_CONV_RES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		*value = (err & 0xFFF) >> (12 - adc->bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		err = regulator_get_voltage(adc->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		*value = err / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		*shift = adc->bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		return IIO_VAL_FRACTIONAL_LOG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define ADCxx1C_CHAN(_bits) {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	.type = IIO_VOLTAGE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.scan_type = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		.sign = 'u',					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		.realbits = (_bits),				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		.storagebits = 16,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		.shift = 12 - (_bits),				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		.endianness = IIO_CPU,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define DEFINE_ADCxx1C_CHANNELS(_name, _bits)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	static const struct iio_chan_spec _name ## _channels[] = {	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		ADCxx1C_CHAN((_bits)),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		IIO_CHAN_SOFT_TIMESTAMP(1),				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	};								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define ADC081C_NUM_CHANNELS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct adcxx1c_model {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	const struct iio_chan_spec* channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	int bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define ADCxx1C_MODEL(_name, _bits)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	{								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		.channels = _name ## _channels,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		.bits = (_bits),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) DEFINE_ADCxx1C_CHANNELS(adc081c,  8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) DEFINE_ADCxx1C_CHANNELS(adc101c, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) DEFINE_ADCxx1C_CHANNELS(adc121c, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* Model ids are indexes in _models array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) enum adcxx1c_model_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	ADC081C = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	ADC101C = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	ADC121C = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static struct adcxx1c_model adcxx1c_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	ADCxx1C_MODEL(adc081c,  8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	ADCxx1C_MODEL(adc101c, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	ADCxx1C_MODEL(adc121c, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const struct iio_info adc081c_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.read_raw = adc081c_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static irqreturn_t adc081c_trigger_handler(int irq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	struct iio_poll_func *pf = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	struct iio_dev *indio_dev = pf->indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct adc081c *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	ret = i2c_smbus_read_word_swapped(data->i2c, REG_CONV_RES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	data->scan.channel = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 					   iio_get_time_ns(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	iio_trigger_notify_done(indio_dev->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int adc081c_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	struct iio_dev *iio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	struct adc081c *adc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	const struct adcxx1c_model *model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (dev_fwnode(&client->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		model = device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		model = &adcxx1c_models[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	iio = devm_iio_device_alloc(&client->dev, sizeof(*adc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (!iio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	adc = iio_priv(iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	adc->i2c = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	adc->bits = model->bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	adc->ref = devm_regulator_get(&client->dev, "vref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	if (IS_ERR(adc->ref))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		return PTR_ERR(adc->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	err = regulator_enable(adc->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	iio->name = dev_name(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	iio->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	iio->info = &adc081c_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	iio->channels = model->channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	iio->num_channels = ADC081C_NUM_CHANNELS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	err = iio_triggered_buffer_setup(iio, NULL, adc081c_trigger_handler, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		dev_err(&client->dev, "iio triggered buffer setup failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		goto err_regulator_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	err = iio_device_register(iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		goto err_buffer_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	i2c_set_clientdata(client, iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) err_buffer_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	iio_triggered_buffer_cleanup(iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) err_regulator_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	regulator_disable(adc->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int adc081c_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	struct iio_dev *iio = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct adc081c *adc = iio_priv(iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	iio_device_unregister(iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	iio_triggered_buffer_cleanup(iio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	regulator_disable(adc->ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct i2c_device_id adc081c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	{ "adc081c", ADC081C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	{ "adc101c", ADC101C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	{ "adc121c", ADC121C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MODULE_DEVICE_TABLE(i2c, adc081c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static const struct acpi_device_id adc081c_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	/* Used on some AAEON boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	{ "ADC081C", (kernel_ulong_t)&adcxx1c_models[ADC081C] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) MODULE_DEVICE_TABLE(acpi, adc081c_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const struct of_device_id adc081c_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	{ .compatible = "ti,adc081c", .data = &adcxx1c_models[ADC081C] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	{ .compatible = "ti,adc101c", .data = &adcxx1c_models[ADC101C] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	{ .compatible = "ti,adc121c", .data = &adcxx1c_models[ADC121C] },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_DEVICE_TABLE(of, adc081c_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static struct i2c_driver adc081c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		.name = "adc081c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		.of_match_table = adc081c_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		.acpi_match_table = adc081c_acpi_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	.probe = adc081c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	.remove = adc081c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	.id_table = adc081c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) module_i2c_driver(adc081c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MODULE_DESCRIPTION("Texas Instruments ADC081C/ADC101C/ADC121C driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MODULE_LICENSE("GPL v2");