^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/math64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/log2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <dt-bindings/iio/qcom,spmi-vadc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "qcom-vadc-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* VADC register and bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define VADC_REVISION2 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define VADC_REVISION2_SUPPORTED_VADC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define VADC_PERPH_TYPE 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define VADC_PERPH_TYPE_ADC 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define VADC_PERPH_SUBTYPE 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define VADC_PERPH_SUBTYPE_VADC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define VADC_STATUS1 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define VADC_STATUS1_OP_MODE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define VADC_STATUS1_REQ_STS BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define VADC_STATUS1_EOC BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define VADC_STATUS1_REQ_STS_EOC_MASK 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define VADC_MODE_CTL 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define VADC_OP_MODE_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define VADC_OP_MODE_NORMAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define VADC_AMUX_TRIM_EN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define VADC_ADC_TRIM_EN BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define VADC_EN_CTL1 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define VADC_EN_CTL1_SET BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define VADC_ADC_CH_SEL_CTL 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define VADC_ADC_DIG_PARAM 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define VADC_HW_SETTLE_DELAY 0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define VADC_CONV_REQ 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define VADC_CONV_REQ_SET BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define VADC_FAST_AVG_CTL 0x5a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define VADC_FAST_AVG_EN 0x5b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define VADC_FAST_AVG_EN_SET BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define VADC_ACCESS 0xd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define VADC_ACCESS_DATA 0xa5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define VADC_PERH_RESET_CTL3 0xda
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define VADC_FOLLOW_WARM_RB BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define VADC_DATA 0x60 /* 16 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define VADC_CHAN_MIN VADC_USBIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define VADC_CHAN_MAX VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * struct vadc_channel_prop - VADC channel property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * @channel: channel number, refer to the channel list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * @calibration: calibration type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * @decimation: sampling rate supported for the channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * @prescale: channel scaling performed on the input signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * @hw_settle_time: the time between AMUX being configured and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * start of conversion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @avg_samples: ability to provide single result from the ADC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * that is an average of multiple measurements.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * @scale_fn_type: Represents the scaling function to convert voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * physical units desired by the client for the channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct vadc_channel_prop {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) enum vadc_calibration calibration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned int decimation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned int prescale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int hw_settle_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) unsigned int avg_samples;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) enum vadc_scale_fn_type scale_fn_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * struct vadc_priv - VADC private structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @regmap: pointer to struct regmap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @dev: pointer to struct device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @base: base address for the ADC peripheral.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @nchannels: number of VADC channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @chan_props: array of VADC channel properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @iio_chans: array of IIO channels specification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @are_ref_measured: are reference points measured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @poll_eoc: use polling instead of interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * @complete: VADC result notification after interrupt is received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * @graph: store parameters for calibration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @lock: ADC lock for access to the peripheral.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct vadc_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u16 base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int nchannels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct vadc_channel_prop *chan_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct iio_chan_spec *iio_chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) bool are_ref_measured;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) bool poll_eoc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct completion complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct vadc_linear_graph graph[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const struct vadc_prescale_ratio vadc_prescale_ratios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {.num = 1, .den = 1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {.num = 1, .den = 3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {.num = 1, .den = 4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {.num = 1, .den = 6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {.num = 1, .den = 20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {.num = 1, .den = 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {.num = 10, .den = 81},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {.num = 1, .den = 10}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static int vadc_read(struct vadc_priv *vadc, u16 offset, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return regmap_bulk_read(vadc->regmap, vadc->base + offset, data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int vadc_write(struct vadc_priv *vadc, u16 offset, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return regmap_write(vadc->regmap, vadc->base + offset, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int vadc_reset(struct vadc_priv *vadc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ret = vadc_write(vadc, VADC_ACCESS, VADC_ACCESS_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ret = vadc_read(vadc, VADC_PERH_RESET_CTL3, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ret = vadc_write(vadc, VADC_ACCESS, VADC_ACCESS_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) data |= VADC_FOLLOW_WARM_RB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return vadc_write(vadc, VADC_PERH_RESET_CTL3, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static int vadc_set_state(struct vadc_priv *vadc, bool state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return vadc_write(vadc, VADC_EN_CTL1, state ? VADC_EN_CTL1_SET : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static void vadc_show_status(struct vadc_priv *vadc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u8 mode, sta1, chan, dig, en, req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ret = vadc_read(vadc, VADC_MODE_CTL, &mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) ret = vadc_read(vadc, VADC_ADC_DIG_PARAM, &dig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) ret = vadc_read(vadc, VADC_ADC_CH_SEL_CTL, &chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) ret = vadc_read(vadc, VADC_CONV_REQ, &req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ret = vadc_read(vadc, VADC_STATUS1, &sta1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ret = vadc_read(vadc, VADC_EN_CTL1, &en);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) dev_err(vadc->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) "mode:%02x en:%02x chan:%02x dig:%02x req:%02x sta1:%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) mode, en, chan, dig, req, sta1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static int vadc_configure(struct vadc_priv *vadc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct vadc_channel_prop *prop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) u8 decimation, mode_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* Mode selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) mode_ctrl = (VADC_OP_MODE_NORMAL << VADC_OP_MODE_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) VADC_ADC_TRIM_EN | VADC_AMUX_TRIM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = vadc_write(vadc, VADC_MODE_CTL, mode_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Channel selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ret = vadc_write(vadc, VADC_ADC_CH_SEL_CTL, prop->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* Digital parameter setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) decimation = prop->decimation << VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = vadc_write(vadc, VADC_ADC_DIG_PARAM, decimation);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* HW settle time delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ret = vadc_write(vadc, VADC_HW_SETTLE_DELAY, prop->hw_settle_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ret = vadc_write(vadc, VADC_FAST_AVG_CTL, prop->avg_samples);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (prop->avg_samples)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ret = vadc_write(vadc, VADC_FAST_AVG_EN, VADC_FAST_AVG_EN_SET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ret = vadc_write(vadc, VADC_FAST_AVG_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int vadc_poll_wait_eoc(struct vadc_priv *vadc, unsigned int interval_us)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) unsigned int count, retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u8 sta1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) retry = interval_us / VADC_CONV_TIME_MIN_US;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) for (count = 0; count < retry; count++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ret = vadc_read(vadc, VADC_STATUS1, &sta1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) sta1 &= VADC_STATUS1_REQ_STS_EOC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (sta1 == VADC_STATUS1_EOC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) usleep_range(VADC_CONV_TIME_MIN_US, VADC_CONV_TIME_MAX_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) vadc_show_status(vadc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int vadc_read_result(struct vadc_priv *vadc, u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ret = regmap_bulk_read(vadc->regmap, vadc->base + VADC_DATA, data, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) *data = clamp_t(u16, *data, VADC_MIN_ADC_CODE, VADC_MAX_ADC_CODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static struct vadc_channel_prop *vadc_get_channel(struct vadc_priv *vadc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) unsigned int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) for (i = 0; i < vadc->nchannels; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (vadc->chan_props[i].channel == num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return &vadc->chan_props[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) dev_dbg(vadc->dev, "no such channel %02x\n", num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int vadc_do_conversion(struct vadc_priv *vadc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct vadc_channel_prop *prop, u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) unsigned int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) mutex_lock(&vadc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) ret = vadc_configure(vadc, prop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (!vadc->poll_eoc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) reinit_completion(&vadc->complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ret = vadc_set_state(vadc, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ret = vadc_write(vadc, VADC_CONV_REQ, VADC_CONV_REQ_SET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) goto err_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) timeout = BIT(prop->avg_samples) * VADC_CONV_TIME_MIN_US * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (vadc->poll_eoc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ret = vadc_poll_wait_eoc(vadc, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ret = wait_for_completion_timeout(&vadc->complete, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ret = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) goto err_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* Double check conversion status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ret = vadc_poll_wait_eoc(vadc, VADC_CONV_TIME_MIN_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) goto err_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ret = vadc_read_result(vadc, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) err_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) vadc_set_state(vadc, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) dev_err(vadc->dev, "conversion failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) mutex_unlock(&vadc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static int vadc_measure_ref_points(struct vadc_priv *vadc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct vadc_channel_prop *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) u16 read_1, read_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) vadc->graph[VADC_CALIB_RATIOMETRIC].dx = VADC_RATIOMETRIC_RANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) vadc->graph[VADC_CALIB_ABSOLUTE].dx = VADC_ABSOLUTE_RANGE_UV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) prop = vadc_get_channel(vadc, VADC_REF_1250MV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ret = vadc_do_conversion(vadc, prop, &read_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* Try with buffered 625mV channel first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) prop = vadc_get_channel(vadc, VADC_SPARE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (!prop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) prop = vadc_get_channel(vadc, VADC_REF_625MV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) ret = vadc_do_conversion(vadc, prop, &read_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (read_1 == read_2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) vadc->graph[VADC_CALIB_ABSOLUTE].dy = read_1 - read_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) vadc->graph[VADC_CALIB_ABSOLUTE].gnd = read_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* Ratiometric calibration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) prop = vadc_get_channel(vadc, VADC_VDD_VADC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) ret = vadc_do_conversion(vadc, prop, &read_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) prop = vadc_get_channel(vadc, VADC_GND_REF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ret = vadc_do_conversion(vadc, prop, &read_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (read_1 == read_2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) vadc->graph[VADC_CALIB_RATIOMETRIC].dy = read_1 - read_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) vadc->graph[VADC_CALIB_RATIOMETRIC].gnd = read_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) dev_err(vadc->dev, "measure reference points failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int vadc_prescaling_from_dt(u32 num, u32 den)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) unsigned int pre;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) for (pre = 0; pre < ARRAY_SIZE(vadc_prescale_ratios); pre++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (vadc_prescale_ratios[pre].num == num &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) vadc_prescale_ratios[pre].den == den)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (pre == ARRAY_SIZE(vadc_prescale_ratios))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return pre;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static int vadc_hw_settle_time_from_dt(u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if ((value <= 1000 && value % 100) || (value > 1000 && value % 2000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (value <= 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) value /= 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) value = value / 2000 + 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static int vadc_avg_samples_from_dt(u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (!is_power_of_2(value) || value > VADC_AVG_SAMPLES_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return __ffs64(value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static int vadc_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) struct iio_chan_spec const *chan, int *val, int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct vadc_priv *vadc = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct vadc_channel_prop *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) u16 adc_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) case IIO_CHAN_INFO_PROCESSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) prop = &vadc->chan_props[chan->address];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ret = vadc_do_conversion(vadc, prop, &adc_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) ret = qcom_vadc_scale(prop->scale_fn_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) &vadc->graph[prop->calibration],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) &vadc_prescale_ratios[prop->prescale],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) (prop->calibration == VADC_CALIB_ABSOLUTE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) adc_code, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) prop = &vadc->chan_props[chan->address];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ret = vadc_do_conversion(vadc, prop, &adc_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) *val = (int)adc_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static int vadc_of_xlate(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) const struct of_phandle_args *iiospec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct vadc_priv *vadc = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) for (i = 0; i < vadc->nchannels; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (vadc->iio_chans[i].channel == iiospec->args[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static const struct iio_info vadc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .read_raw = vadc_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .of_xlate = vadc_of_xlate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) struct vadc_channels {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) const char *datasheet_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) unsigned int prescale_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) enum iio_chan_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) long info_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) enum vadc_scale_fn_type scale_fn_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) #define VADC_CHAN(_dname, _type, _mask, _pre, _scale) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) [VADC_##_dname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .datasheet_name = __stringify(_dname), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .prescale_index = _pre, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .type = _type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .info_mask = _mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .scale_fn_type = _scale \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) #define VADC_NO_CHAN(_dname, _type, _mask, _pre) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) [VADC_##_dname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .datasheet_name = __stringify(_dname), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .prescale_index = _pre, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .type = _type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .info_mask = _mask \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) #define VADC_CHAN_TEMP(_dname, _pre, _scale) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) VADC_CHAN(_dname, IIO_TEMP, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_PROCESSED), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) _pre, _scale) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) #define VADC_CHAN_VOLT(_dname, _pre, _scale) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) VADC_CHAN(_dname, IIO_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_PROCESSED),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) _pre, _scale) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) #define VADC_CHAN_NO_SCALE(_dname, _pre) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) VADC_NO_CHAN(_dname, IIO_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) _pre) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * The array represents all possible ADC channels found in the supported PMICs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * Every index in the array is equal to the channel number per datasheet. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * gaps in the array should be treated as reserved channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static const struct vadc_channels vadc_chans[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) VADC_CHAN_VOLT(USBIN, 4, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) VADC_CHAN_VOLT(DCIN, 4, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) VADC_CHAN_NO_SCALE(VCHG_SNS, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) VADC_CHAN_NO_SCALE(SPARE1_03, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) VADC_CHAN_NO_SCALE(USB_ID_MV, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) VADC_CHAN_VOLT(VCOIN, 1, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) VADC_CHAN_NO_SCALE(VBAT_SNS, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) VADC_CHAN_VOLT(VSYS, 1, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) VADC_CHAN_TEMP(DIE_TEMP, 0, SCALE_PMIC_THERM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) VADC_CHAN_VOLT(REF_625MV, 0, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) VADC_CHAN_VOLT(REF_1250MV, 0, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) VADC_CHAN_NO_SCALE(CHG_TEMP, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) VADC_CHAN_NO_SCALE(SPARE1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) VADC_CHAN_TEMP(SPARE2, 0, SCALE_PMI_CHG_TEMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) VADC_CHAN_VOLT(GND_REF, 0, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) VADC_CHAN_VOLT(VDD_VADC, 0, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) VADC_CHAN_NO_SCALE(P_MUX1_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) VADC_CHAN_NO_SCALE(P_MUX2_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) VADC_CHAN_NO_SCALE(P_MUX3_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) VADC_CHAN_NO_SCALE(P_MUX4_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) VADC_CHAN_NO_SCALE(P_MUX5_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) VADC_CHAN_NO_SCALE(P_MUX6_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) VADC_CHAN_NO_SCALE(P_MUX7_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) VADC_CHAN_NO_SCALE(P_MUX8_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) VADC_CHAN_NO_SCALE(P_MUX9_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) VADC_CHAN_NO_SCALE(P_MUX10_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) VADC_CHAN_NO_SCALE(P_MUX11_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) VADC_CHAN_NO_SCALE(P_MUX12_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) VADC_CHAN_NO_SCALE(P_MUX13_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) VADC_CHAN_NO_SCALE(P_MUX14_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) VADC_CHAN_NO_SCALE(P_MUX15_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) VADC_CHAN_NO_SCALE(P_MUX16_1_1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) VADC_CHAN_NO_SCALE(P_MUX1_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) VADC_CHAN_NO_SCALE(P_MUX2_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) VADC_CHAN_NO_SCALE(P_MUX3_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) VADC_CHAN_NO_SCALE(P_MUX4_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) VADC_CHAN_NO_SCALE(P_MUX5_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) VADC_CHAN_NO_SCALE(P_MUX6_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) VADC_CHAN_NO_SCALE(P_MUX7_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) VADC_CHAN_NO_SCALE(P_MUX8_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) VADC_CHAN_NO_SCALE(P_MUX9_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) VADC_CHAN_NO_SCALE(P_MUX10_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) VADC_CHAN_NO_SCALE(P_MUX11_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) VADC_CHAN_NO_SCALE(P_MUX12_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) VADC_CHAN_NO_SCALE(P_MUX13_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) VADC_CHAN_NO_SCALE(P_MUX14_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) VADC_CHAN_NO_SCALE(P_MUX15_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) VADC_CHAN_NO_SCALE(P_MUX16_1_3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) VADC_CHAN_NO_SCALE(LR_MUX1_BAT_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) VADC_CHAN_VOLT(LR_MUX2_BAT_ID, 0, SCALE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) VADC_CHAN_NO_SCALE(LR_MUX3_XO_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) VADC_CHAN_NO_SCALE(LR_MUX4_AMUX_THM1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) VADC_CHAN_NO_SCALE(LR_MUX5_AMUX_THM2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) VADC_CHAN_NO_SCALE(LR_MUX6_AMUX_THM3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) VADC_CHAN_NO_SCALE(LR_MUX7_HW_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) VADC_CHAN_NO_SCALE(LR_MUX8_AMUX_THM4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) VADC_CHAN_NO_SCALE(LR_MUX9_AMUX_THM5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) VADC_CHAN_NO_SCALE(LR_MUX10_USB_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) VADC_CHAN_NO_SCALE(AMUX_PU1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) VADC_CHAN_NO_SCALE(AMUX_PU2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) VADC_CHAN_NO_SCALE(LR_MUX3_BUF_XO_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) VADC_CHAN_NO_SCALE(LR_MUX1_PU1_BAT_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) VADC_CHAN_NO_SCALE(LR_MUX2_PU1_BAT_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) VADC_CHAN_NO_SCALE(LR_MUX3_PU1_XO_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) VADC_CHAN_TEMP(LR_MUX4_PU1_AMUX_THM1, 0, SCALE_THERM_100K_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) VADC_CHAN_TEMP(LR_MUX5_PU1_AMUX_THM2, 0, SCALE_THERM_100K_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) VADC_CHAN_TEMP(LR_MUX6_PU1_AMUX_THM3, 0, SCALE_THERM_100K_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) VADC_CHAN_NO_SCALE(LR_MUX7_PU1_AMUX_HW_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) VADC_CHAN_TEMP(LR_MUX8_PU1_AMUX_THM4, 0, SCALE_THERM_100K_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) VADC_CHAN_TEMP(LR_MUX9_PU1_AMUX_THM5, 0, SCALE_THERM_100K_PULLUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) VADC_CHAN_NO_SCALE(LR_MUX10_PU1_AMUX_USB_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) VADC_CHAN_TEMP(LR_MUX3_BUF_PU1_XO_THERM, 0, SCALE_XOTHERM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) VADC_CHAN_NO_SCALE(LR_MUX1_PU2_BAT_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) VADC_CHAN_NO_SCALE(LR_MUX2_PU2_BAT_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) VADC_CHAN_NO_SCALE(LR_MUX3_PU2_XO_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) VADC_CHAN_NO_SCALE(LR_MUX4_PU2_AMUX_THM1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) VADC_CHAN_NO_SCALE(LR_MUX5_PU2_AMUX_THM2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) VADC_CHAN_NO_SCALE(LR_MUX6_PU2_AMUX_THM3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) VADC_CHAN_NO_SCALE(LR_MUX7_PU2_AMUX_HW_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) VADC_CHAN_NO_SCALE(LR_MUX8_PU2_AMUX_THM4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) VADC_CHAN_NO_SCALE(LR_MUX9_PU2_AMUX_THM5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) VADC_CHAN_NO_SCALE(LR_MUX10_PU2_AMUX_USB_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) VADC_CHAN_NO_SCALE(LR_MUX3_BUF_PU2_XO_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) VADC_CHAN_NO_SCALE(LR_MUX1_PU1_PU2_BAT_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) VADC_CHAN_NO_SCALE(LR_MUX2_PU1_PU2_BAT_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) VADC_CHAN_NO_SCALE(LR_MUX3_PU1_PU2_XO_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) VADC_CHAN_NO_SCALE(LR_MUX4_PU1_PU2_AMUX_THM1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) VADC_CHAN_NO_SCALE(LR_MUX5_PU1_PU2_AMUX_THM2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) VADC_CHAN_NO_SCALE(LR_MUX6_PU1_PU2_AMUX_THM3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) VADC_CHAN_NO_SCALE(LR_MUX7_PU1_PU2_AMUX_HW_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) VADC_CHAN_NO_SCALE(LR_MUX8_PU1_PU2_AMUX_THM4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) VADC_CHAN_NO_SCALE(LR_MUX9_PU1_PU2_AMUX_THM5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) VADC_CHAN_NO_SCALE(LR_MUX10_PU1_PU2_AMUX_USB_ID, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) VADC_CHAN_NO_SCALE(LR_MUX3_BUF_PU1_PU2_XO_THERM, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static int vadc_get_dt_channel_data(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) struct vadc_channel_prop *prop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) const char *name = node->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) u32 chan, value, varr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) ret = of_property_read_u32(node, "reg", &chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) dev_err(dev, "invalid channel number %s\n", name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (chan > VADC_CHAN_MAX || chan < VADC_CHAN_MIN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) dev_err(dev, "%s invalid channel number %d\n", name, chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) /* the channel has DT description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) prop->channel = chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) ret = of_property_read_u32(node, "qcom,decimation", &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) ret = qcom_vadc_decimation_from_dt(value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) dev_err(dev, "%02x invalid decimation %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) chan, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) prop->decimation = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) prop->decimation = VADC_DEF_DECIMATION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) ret = of_property_read_u32_array(node, "qcom,pre-scaling", varr, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) ret = vadc_prescaling_from_dt(varr[0], varr[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) dev_err(dev, "%02x invalid pre-scaling <%d %d>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) chan, varr[0], varr[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) prop->prescale = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) prop->prescale = vadc_chans[prop->channel].prescale_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) ret = of_property_read_u32(node, "qcom,hw-settle-time", &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) ret = vadc_hw_settle_time_from_dt(value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) dev_err(dev, "%02x invalid hw-settle-time %d us\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) chan, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) prop->hw_settle_time = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) prop->hw_settle_time = VADC_DEF_HW_SETTLE_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) ret = of_property_read_u32(node, "qcom,avg-samples", &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) ret = vadc_avg_samples_from_dt(value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) dev_err(dev, "%02x invalid avg-samples %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) chan, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) prop->avg_samples = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) prop->avg_samples = VADC_DEF_AVG_SAMPLES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) if (of_property_read_bool(node, "qcom,ratiometric"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) prop->calibration = VADC_CALIB_RATIOMETRIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) prop->calibration = VADC_CALIB_ABSOLUTE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) dev_dbg(dev, "%02x name %s\n", chan, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static int vadc_get_dt_data(struct vadc_priv *vadc, struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) const struct vadc_channels *vadc_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) struct iio_chan_spec *iio_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) struct vadc_channel_prop prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) struct device_node *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) unsigned int index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) vadc->nchannels = of_get_available_child_count(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) if (!vadc->nchannels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) vadc->iio_chans = devm_kcalloc(vadc->dev, vadc->nchannels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) sizeof(*vadc->iio_chans), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) if (!vadc->iio_chans)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) vadc->chan_props = devm_kcalloc(vadc->dev, vadc->nchannels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) sizeof(*vadc->chan_props), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) if (!vadc->chan_props)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) iio_chan = vadc->iio_chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) for_each_available_child_of_node(node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) ret = vadc_get_dt_channel_data(vadc->dev, &prop, child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) prop.scale_fn_type = vadc_chans[prop.channel].scale_fn_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) vadc->chan_props[index] = prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) vadc_chan = &vadc_chans[prop.channel];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) iio_chan->channel = prop.channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) iio_chan->datasheet_name = vadc_chan->datasheet_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) iio_chan->info_mask_separate = vadc_chan->info_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) iio_chan->type = vadc_chan->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) iio_chan->indexed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) iio_chan->address = index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) iio_chan++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) /* These channels are mandatory, they are used as reference points */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (!vadc_get_channel(vadc, VADC_REF_1250MV)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) dev_err(vadc->dev, "Please define 1.25V channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) if (!vadc_get_channel(vadc, VADC_REF_625MV)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) dev_err(vadc->dev, "Please define 0.625V channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (!vadc_get_channel(vadc, VADC_VDD_VADC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) dev_err(vadc->dev, "Please define VDD channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (!vadc_get_channel(vadc, VADC_GND_REF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) dev_err(vadc->dev, "Please define GND channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static irqreturn_t vadc_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) struct vadc_priv *vadc = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) complete(&vadc->complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) static int vadc_check_revision(struct vadc_priv *vadc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) ret = vadc_read(vadc, VADC_PERPH_TYPE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (val < VADC_PERPH_TYPE_ADC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) dev_err(vadc->dev, "%d is not ADC\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) ret = vadc_read(vadc, VADC_PERPH_SUBTYPE, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (val < VADC_PERPH_SUBTYPE_VADC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) dev_err(vadc->dev, "%d is not VADC\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) ret = vadc_read(vadc, VADC_REVISION2, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (val < VADC_REVISION2_SUPPORTED_VADC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) dev_err(vadc->dev, "revision %d not supported\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static int vadc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) struct device_node *node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) struct vadc_priv *vadc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) int ret, irq_eoc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) regmap = dev_get_regmap(dev->parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) if (!regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) ret = of_property_read_u32(node, "reg", ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) indio_dev = devm_iio_device_alloc(dev, sizeof(*vadc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) vadc = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) vadc->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) vadc->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) vadc->base = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) vadc->are_ref_measured = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) init_completion(&vadc->complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) mutex_init(&vadc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) ret = vadc_check_revision(vadc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) ret = vadc_get_dt_data(vadc, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) irq_eoc = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) if (irq_eoc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) if (irq_eoc == -EPROBE_DEFER || irq_eoc == -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return irq_eoc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) vadc->poll_eoc = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) ret = devm_request_irq(dev, irq_eoc, vadc_isr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) "spmi-vadc", vadc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) ret = vadc_reset(vadc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) dev_err(dev, "reset failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) ret = vadc_measure_ref_points(vadc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) indio_dev->name = pdev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) indio_dev->info = &vadc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) indio_dev->channels = vadc->iio_chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) indio_dev->num_channels = vadc->nchannels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return devm_iio_device_register(dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static const struct of_device_id vadc_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) { .compatible = "qcom,spmi-vadc" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) MODULE_DEVICE_TABLE(of, vadc_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) static struct platform_driver vadc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) .name = "qcom-spmi-vadc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) .of_match_table = vadc_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) .probe = vadc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) module_platform_driver(vadc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) MODULE_ALIAS("platform:qcom-spmi-vadc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) MODULE_DESCRIPTION("Qualcomm SPMI PMIC voltage ADC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) MODULE_AUTHOR("Stanimir Varbanov <svarbanov@mm-sol.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) MODULE_AUTHOR("Ivan T. Ivanov <iivanov@mm-sol.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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