^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MP2629 Driver for ADC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2020 Monolithic Power Systems, Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Saravanan Sekar <sravanhome@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/iio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/iio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mfd/mp2629.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define MP2629_REG_ADC_CTRL 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MP2629_REG_BATT_VOLT 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MP2629_REG_SYSTEM_VOLT 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MP2629_REG_INPUT_VOLT 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MP2629_REG_BATT_CURRENT 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MP2629_REG_INPUT_CURRENT 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MP2629_ADC_START BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MP2629_ADC_CONTINUOUS BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MP2629_MAP(_mp, _mpc) IIO_MAP(#_mp, "mp2629_charger", "mp2629-"_mpc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MP2629_ADC_CHAN(_ch, _type) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .type = _type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .datasheet_name = #_ch, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .channel = MP2629_ ## _ch, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .address = MP2629_REG_ ## _ch, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct mp2629_adc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static struct iio_chan_spec mp2629_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MP2629_ADC_CHAN(BATT_VOLT, IIO_VOLTAGE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MP2629_ADC_CHAN(SYSTEM_VOLT, IIO_VOLTAGE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MP2629_ADC_CHAN(INPUT_VOLT, IIO_VOLTAGE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MP2629_ADC_CHAN(BATT_CURRENT, IIO_CURRENT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MP2629_ADC_CHAN(INPUT_CURRENT, IIO_CURRENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static struct iio_map mp2629_adc_maps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MP2629_MAP(BATT_VOLT, "batt-volt"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MP2629_MAP(SYSTEM_VOLT, "system-volt"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MP2629_MAP(INPUT_VOLT, "input-volt"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MP2629_MAP(BATT_CURRENT, "batt-current"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MP2629_MAP(INPUT_CURRENT, "input-current")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int mp2629_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct mp2629_adc *info = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ret = regmap_read(info->regmap, chan->address, &rval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (chan->address == MP2629_INPUT_VOLT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) rval &= GENMASK(6, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) *val = rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) switch (chan->channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) case MP2629_BATT_VOLT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) case MP2629_SYSTEM_VOLT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) *val = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) case MP2629_INPUT_VOLT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) *val = 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case MP2629_BATT_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) *val = 175;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *val2 = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case MP2629_INPUT_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) *val = 133;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *val2 = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return IIO_VAL_FRACTIONAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static const struct iio_info mp2629_adc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .read_raw = &mp2629_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int mp2629_adc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct mp2629_data *ddata = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct mp2629_adc *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) indio_dev = devm_iio_device_alloc(dev, sizeof(*info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) info = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) info->regmap = ddata->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) info->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) platform_set_drvdata(pdev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ret = regmap_update_bits(info->regmap, MP2629_REG_ADC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MP2629_ADC_START | MP2629_ADC_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MP2629_ADC_START | MP2629_ADC_CONTINUOUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev_err(dev, "adc enable fail: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ret = iio_map_array_register(indio_dev, mp2629_adc_maps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) dev_err(dev, "IIO maps register fail: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) goto fail_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) indio_dev->name = "mp2629-adc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) indio_dev->dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) indio_dev->channels = mp2629_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) indio_dev->num_channels = ARRAY_SIZE(mp2629_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) indio_dev->info = &mp2629_adc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dev_err(dev, "IIO device register fail: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) goto fail_map_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) fail_map_unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) iio_map_array_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) fail_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) regmap_update_bits(info->regmap, MP2629_REG_ADC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) MP2629_ADC_CONTINUOUS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) regmap_update_bits(info->regmap, MP2629_REG_ADC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MP2629_ADC_START, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static int mp2629_adc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct iio_dev *indio_dev = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct mp2629_adc *info = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) iio_map_array_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) regmap_update_bits(info->regmap, MP2629_REG_ADC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MP2629_ADC_CONTINUOUS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) regmap_update_bits(info->regmap, MP2629_REG_ADC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MP2629_ADC_START, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const struct of_device_id mp2629_adc_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) { .compatible = "mps,mp2629_adc"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MODULE_DEVICE_TABLE(of, mp2629_adc_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static struct platform_driver mp2629_adc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .name = "mp2629_adc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .of_match_table = mp2629_adc_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .probe = mp2629_adc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .remove = mp2629_adc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) module_platform_driver(mp2629_adc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) MODULE_AUTHOR("Saravanan Sekar <sravanhome@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MODULE_DESCRIPTION("MP2629 ADC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) MODULE_LICENSE("GPL");