^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AD7091R5 Analog to Digital converter driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2014-2019 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "ad7091r-base.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static const struct iio_event_spec ad7091r5_events[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .type = IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .dir = IIO_EV_DIR_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .mask_separate = BIT(IIO_EV_INFO_VALUE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) BIT(IIO_EV_INFO_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .type = IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .dir = IIO_EV_DIR_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .mask_separate = BIT(IIO_EV_INFO_VALUE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) BIT(IIO_EV_INFO_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .type = IIO_EV_TYPE_THRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .dir = IIO_EV_DIR_EITHER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define AD7091R_CHANNEL(idx, bits, ev, num_ev) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .type = IIO_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .channel = idx, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .event_spec = ev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .num_event_specs = num_ev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .scan_type.storagebits = 16, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .scan_type.realbits = bits, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static const struct iio_chan_spec ad7091r5_channels_irq[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) AD7091R_CHANNEL(0, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) AD7091R_CHANNEL(1, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) AD7091R_CHANNEL(2, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) AD7091R_CHANNEL(3, 12, ad7091r5_events, ARRAY_SIZE(ad7091r5_events)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static const struct iio_chan_spec ad7091r5_channels_noirq[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) AD7091R_CHANNEL(0, 12, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) AD7091R_CHANNEL(1, 12, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) AD7091R_CHANNEL(2, 12, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) AD7091R_CHANNEL(3, 12, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static const struct ad7091r_chip_info ad7091r5_chip_info_irq = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .channels = ad7091r5_channels_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .num_channels = ARRAY_SIZE(ad7091r5_channels_irq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .vref_mV = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const struct ad7091r_chip_info ad7091r5_chip_info_noirq = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .channels = ad7091r5_channels_noirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .num_channels = ARRAY_SIZE(ad7091r5_channels_noirq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .vref_mV = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int ad7091r5_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) const struct ad7091r_chip_info *chip_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct regmap *map = devm_regmap_init_i2c(i2c, &ad7091r_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (IS_ERR(map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return PTR_ERR(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (i2c->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) chip_info = &ad7091r5_chip_info_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) chip_info = &ad7091r5_chip_info_noirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return ad7091r_probe(&i2c->dev, id->name, chip_info, map, i2c->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static const struct of_device_id ad7091r5_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { .compatible = "adi,ad7091r5" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) MODULE_DEVICE_TABLE(of, ad7091r5_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static const struct i2c_device_id ad7091r5_i2c_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {"ad7091r5", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MODULE_DEVICE_TABLE(i2c, ad7091r5_i2c_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static struct i2c_driver ad7091r5_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .name = "ad7091r5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .of_match_table = ad7091r5_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .probe = ad7091r5_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .id_table = ad7091r5_i2c_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) module_i2c_driver(ad7091r5_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MODULE_AUTHOR("Beniamin Bia <beniamin.bia@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MODULE_DESCRIPTION("Analog Devices AD7091R5 multi-channel ADC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MODULE_LICENSE("GPL v2");