^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Sensortek STK8312 3-Axis Accelerometer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * IIO driver for STK8312; 7-bit I2C address: 0x3D.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/iio/trigger.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/iio/trigger_consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define STK8312_REG_XOUT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define STK8312_REG_YOUT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define STK8312_REG_ZOUT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define STK8312_REG_INTSU 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define STK8312_REG_MODE 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define STK8312_REG_SR 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define STK8312_REG_STH 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define STK8312_REG_RESET 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define STK8312_REG_AFECTRL 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define STK8312_REG_OTPADDR 0x3D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define STK8312_REG_OTPDATA 0x3E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define STK8312_REG_OTPCTRL 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define STK8312_MODE_ACTIVE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define STK8312_MODE_STANDBY 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define STK8312_MODE_INT_AH_PP 0xC0 /* active-high, push-pull */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define STK8312_DREADY_BIT BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define STK8312_RNG_6G 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define STK8312_RNG_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define STK8312_RNG_MASK GENMASK(7, 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define STK8312_SR_MASK GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define STK8312_SR_400HZ_IDX 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define STK8312_ALL_CHANNEL_MASK GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define STK8312_ALL_CHANNEL_SIZE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define STK8312_DRIVER_NAME "stk8312"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define STK8312_IRQ_NAME "stk8312_event"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * The accelerometer has two measurement ranges:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * -6g - +6g (8-bit, signed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * -16g - +16g (8-bit, signed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * scale1 = (6 + 6) * 9.81 / (2^8 - 1) = 0.4616
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * scale2 = (16 + 16) * 9.81 / (2^8 - 1) = 1.2311
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define STK8312_SCALE_AVAIL "0.4616 1.2311"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static const int stk8312_scale_table[][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {0, 461600}, {1, 231100}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) } stk8312_samp_freq_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {400, 0}, {200, 0}, {100, 0}, {50, 0}, {25, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {12, 500000}, {6, 250000}, {3, 125000}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define STK8312_ACCEL_CHANNEL(index, reg, axis) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .type = IIO_ACCEL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .address = reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .modified = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .channel2 = IIO_MOD_##axis, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) BIT(IIO_CHAN_INFO_SAMP_FREQ), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .scan_index = index, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .scan_type = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .sign = 's', \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .realbits = 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .storagebits = 8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .endianness = IIO_CPU, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static const struct iio_chan_spec stk8312_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) STK8312_ACCEL_CHANNEL(0, STK8312_REG_XOUT, X),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) STK8312_ACCEL_CHANNEL(1, STK8312_REG_YOUT, Y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) STK8312_ACCEL_CHANNEL(2, STK8312_REG_ZOUT, Z),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) IIO_CHAN_SOFT_TIMESTAMP(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct stk8312_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u8 range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u8 sample_rate_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct iio_trigger *dready_trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) bool dready_trigger_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Ensure timestamp is naturally aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) s8 chans[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) s64 timestamp __aligned(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static IIO_CONST_ATTR(in_accel_scale_available, STK8312_SCALE_AVAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("3.125 6.25 12.5 25 50 100 200 400");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static struct attribute *stk8312_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) &iio_const_attr_in_accel_scale_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) &iio_const_attr_sampling_frequency_available.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static const struct attribute_group stk8312_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .attrs = stk8312_attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int stk8312_otp_init(struct stk8312_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int count = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPADDR, 0x70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) goto exit_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = i2c_smbus_write_byte_data(client, STK8312_REG_OTPCTRL, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) goto exit_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) usleep_range(1000, 5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) goto exit_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) } while (!(ret & BIT(7)) && count > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ret = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) goto exit_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ret = i2c_smbus_read_byte_data(client, STK8312_REG_OTPDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) goto exit_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_AFECTRL, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) goto exit_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) exit_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) dev_err(&client->dev, "failed to initialize sensor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int stk8312_set_mode(struct stk8312_data *data, u8 mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (mode == data->mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ret = i2c_smbus_write_byte_data(client, STK8312_REG_MODE, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) dev_err(&client->dev, "failed to change sensor mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) data->mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (mode & STK8312_MODE_ACTIVE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* Need to run OTP sequence before entering active mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) usleep_range(1000, 5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) ret = stk8312_otp_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int stk8312_set_interrupts(struct stk8312_data *data, u8 int_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) mode = data->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* We need to go in standby mode to modify registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) ret = i2c_smbus_write_byte_data(client, STK8312_REG_INTSU, int_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) dev_err(&client->dev, "failed to set interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) stk8312_set_mode(data, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return stk8312_set_mode(data, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static int stk8312_data_rdy_trigger_set_state(struct iio_trigger *trig,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) bool state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ret = stk8312_set_interrupts(data, STK8312_DREADY_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ret = stk8312_set_interrupts(data, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) dev_err(&data->client->dev, "failed to set trigger state\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) data->dready_trigger_on = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static const struct iio_trigger_ops stk8312_trigger_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .set_trigger_state = stk8312_data_rdy_trigger_set_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static int stk8312_set_sample_rate(struct stk8312_data *data, u8 rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) u8 masked_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (rate == data->sample_rate_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) mode = data->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* We need to go in standby mode to modify registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ret = i2c_smbus_read_byte_data(client, STK8312_REG_SR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) goto err_activate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) masked_reg = (ret & (~STK8312_SR_MASK)) | rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ret = i2c_smbus_write_byte_data(client, STK8312_REG_SR, masked_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) goto err_activate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) data->sample_rate_idx = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return stk8312_set_mode(data, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) err_activate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) dev_err(&client->dev, "failed to set sampling rate\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) stk8312_set_mode(data, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static int stk8312_set_range(struct stk8312_data *data, u8 range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) u8 masked_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (range != 1 && range != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) else if (range == data->range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) mode = data->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* We need to go in standby mode to modify registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ret = stk8312_set_mode(data, STK8312_MODE_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ret = i2c_smbus_read_byte_data(client, STK8312_REG_STH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) goto err_activate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) masked_reg = ret & (~STK8312_RNG_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) masked_reg |= range << STK8312_RNG_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ret = i2c_smbus_write_byte_data(client, STK8312_REG_STH, masked_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) goto err_activate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) data->range = range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return stk8312_set_mode(data, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) err_activate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) dev_err(&client->dev, "failed to change sensor range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) stk8312_set_mode(data, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static int stk8312_read_accel(struct stk8312_data *data, u8 address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (address > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ret = i2c_smbus_read_byte_data(client, address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) dev_err(&client->dev, "register read failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static int stk8312_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (iio_buffer_enabled(indio_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ret = stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ret = stk8312_read_accel(data, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) stk8312_set_mode(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) data->mode & (~STK8312_MODE_ACTIVE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) *val = sign_extend32(ret, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) ret = stk8312_set_mode(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) data->mode & (~STK8312_MODE_ACTIVE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) *val = stk8312_scale_table[data->range - 1][0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) *val2 = stk8312_scale_table[data->range - 1][1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case IIO_CHAN_INFO_SAMP_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) *val = stk8312_samp_freq_table[data->sample_rate_idx].val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) *val2 = stk8312_samp_freq_table[data->sample_rate_idx].val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static int stk8312_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) int val, int val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int index = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) for (i = 0; i < ARRAY_SIZE(stk8312_scale_table); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (val == stk8312_scale_table[i][0] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) val2 == stk8312_scale_table[i][1]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) index = i + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) ret = stk8312_set_range(data, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) case IIO_CHAN_INFO_SAMP_FREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) for (i = 0; i < ARRAY_SIZE(stk8312_samp_freq_table); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (val == stk8312_samp_freq_table[i].val &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) val2 == stk8312_samp_freq_table[i].val2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) index = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ret = stk8312_set_sample_rate(data, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static const struct iio_info stk8312_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .read_raw = stk8312_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .write_raw = stk8312_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .attrs = &stk8312_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static irqreturn_t stk8312_trigger_handler(int irq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct iio_poll_func *pf = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct iio_dev *indio_dev = pf->indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int bit, ret, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) mutex_lock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * Do a bulk read if all channels are requested,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * from 0x00 (XOUT) to 0x02 (ZOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (*(indio_dev->active_scan_mask) == STK8312_ALL_CHANNEL_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) ret = i2c_smbus_read_i2c_block_data(data->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) STK8312_REG_XOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) STK8312_ALL_CHANNEL_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) data->scan.chans);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (ret < STK8312_ALL_CHANNEL_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) dev_err(&data->client->dev, "register read failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) for_each_set_bit(bit, indio_dev->active_scan_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) indio_dev->masklength) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) ret = stk8312_read_accel(data, bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) data->scan.chans[i++] = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) mutex_unlock(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) pf->timestamp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) iio_trigger_notify_done(indio_dev->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static irqreturn_t stk8312_data_rdy_trig_poll(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct iio_dev *indio_dev = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (data->dready_trigger_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) iio_trigger_poll(data->dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static int stk8312_buffer_preenable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static int stk8312_buffer_postdisable(struct iio_dev *indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static const struct iio_buffer_setup_ops stk8312_buffer_setup_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .preenable = stk8312_buffer_preenable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .postdisable = stk8312_buffer_postdisable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static int stk8312_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) struct stk8312_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (!indio_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev_err(&client->dev, "iio allocation failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) mutex_init(&data->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) indio_dev->info = &stk8312_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) indio_dev->name = STK8312_DRIVER_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) indio_dev->channels = stk8312_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) indio_dev->num_channels = ARRAY_SIZE(stk8312_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /* A software reset is recommended at power-on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) ret = i2c_smbus_write_byte_data(data->client, STK8312_REG_RESET, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) dev_err(&client->dev, "failed to reset sensor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) data->sample_rate_idx = STK8312_SR_400HZ_IDX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) ret = stk8312_set_range(data, STK8312_RNG_6G);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) ret = stk8312_set_mode(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) STK8312_MODE_INT_AH_PP | STK8312_MODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (client->irq > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) ret = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) stk8312_data_rdy_trig_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) IRQF_TRIGGER_RISING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) STK8312_IRQ_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) dev_err(&client->dev, "request irq %d failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) goto err_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) data->dready_trig = devm_iio_trigger_alloc(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) "%s-dev%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) indio_dev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) indio_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (!data->dready_trig) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) goto err_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) data->dready_trig->dev.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) data->dready_trig->ops = &stk8312_trigger_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) iio_trigger_set_drvdata(data->dready_trig, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ret = iio_trigger_register(data->dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) dev_err(&client->dev, "iio trigger register failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) goto err_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ret = iio_triggered_buffer_setup(indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) iio_pollfunc_store_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) stk8312_trigger_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) &stk8312_buffer_setup_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) dev_err(&client->dev, "iio triggered buffer setup failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) goto err_trigger_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) dev_err(&client->dev, "device_register failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) goto err_buffer_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) err_buffer_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) err_trigger_unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (data->dready_trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) iio_trigger_unregister(data->dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) err_power_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) stk8312_set_mode(data, STK8312_MODE_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) static int stk8312_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) struct iio_dev *indio_dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) struct stk8312_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) iio_triggered_buffer_cleanup(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (data->dready_trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) iio_trigger_unregister(data->dready_trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) return stk8312_set_mode(data, STK8312_MODE_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static int stk8312_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) struct stk8312_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) return stk8312_set_mode(data, data->mode & (~STK8312_MODE_ACTIVE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) static int stk8312_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) struct stk8312_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) return stk8312_set_mode(data, data->mode | STK8312_MODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static SIMPLE_DEV_PM_OPS(stk8312_pm_ops, stk8312_suspend, stk8312_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) #define STK8312_PM_OPS (&stk8312_pm_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) #define STK8312_PM_OPS NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static const struct i2c_device_id stk8312_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {"STK8312", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) MODULE_DEVICE_TABLE(i2c, stk8312_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static const struct acpi_device_id stk8312_acpi_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {"STK8312", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) MODULE_DEVICE_TABLE(acpi, stk8312_acpi_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static struct i2c_driver stk8312_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .name = STK8312_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .pm = STK8312_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .acpi_match_table = ACPI_PTR(stk8312_acpi_id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .probe = stk8312_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) .remove = stk8312_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .id_table = stk8312_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) module_i2c_driver(stk8312_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) MODULE_DESCRIPTION("STK8312 3-Axis Accelerometer driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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