Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * MXC6255 - MEMSIC orientation sensing accelerometer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2015, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * IIO driver for MXC6255 (7-bit I2C slave address 0x15).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define MXC6255_DRV_NAME		"mxc6255"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define MXC6255_REGMAP_NAME		"mxc6255_regmap"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define MXC6255_REG_XOUT		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define MXC6255_REG_YOUT		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MXC6255_REG_CHIP_ID		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define MXC6255_CHIP_ID			0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * MXC6255 has only one measurement range: +/- 2G.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * The acceleration output is an 8-bit value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * Scale is calculated as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * (2 + 2) * 9.80665 / (2^8 - 1) = 0.153829
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * Scale value for +/- 2G measurement range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define MXC6255_SCALE			153829
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) enum mxc6255_axis {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	AXIS_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	AXIS_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) struct mxc6255_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static int mxc6255_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			    struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 			    int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct mxc6255_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		ret = regmap_read(data->regmap, chan->address, &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 			dev_err(&data->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 				"Error reading reg %lu\n", chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		*val = sign_extend32(reg, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		*val2 = MXC6255_SCALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static const struct iio_info mxc6255_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	.read_raw	= mxc6255_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define MXC6255_CHANNEL(_axis, reg) {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.type = IIO_ACCEL,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.modified = 1,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	.channel2 = IIO_MOD_##_axis,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.address = reg,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static const struct iio_chan_spec mxc6255_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	MXC6255_CHANNEL(X, MXC6255_REG_XOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	MXC6255_CHANNEL(Y, MXC6255_REG_YOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static bool mxc6255_is_readable_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	case MXC6255_REG_XOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	case MXC6255_REG_YOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	case MXC6255_REG_CHIP_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static const struct regmap_config mxc6255_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	.name = MXC6255_REGMAP_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	.readable_reg = mxc6255_is_readable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int mxc6255_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	struct mxc6255_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	unsigned int chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	regmap = devm_regmap_init_i2c(client, &mxc6255_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		dev_err(&client->dev, "Error initializing regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	data->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	indio_dev->name = MXC6255_DRV_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	indio_dev->channels = mxc6255_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	indio_dev->num_channels = ARRAY_SIZE(mxc6255_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	indio_dev->info = &mxc6255_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	ret = regmap_read(data->regmap, MXC6255_REG_CHIP_ID, &chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		dev_err(&client->dev, "Error reading chip id %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if ((chip_id & 0x1f) != MXC6255_CHIP_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		dev_err(&client->dev, "Invalid chip id %x\n", chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	dev_dbg(&client->dev, "Chip id %x\n", chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	ret = devm_iio_device_register(&client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		dev_err(&client->dev, "Could not register IIO device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const struct acpi_device_id mxc6255_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	{"MXC6225",	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	{"MXC6255",	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MODULE_DEVICE_TABLE(acpi, mxc6255_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static const struct i2c_device_id mxc6255_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	{"mxc6225",	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	{"mxc6255",	0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MODULE_DEVICE_TABLE(i2c, mxc6255_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static struct i2c_driver mxc6255_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		.name = MXC6255_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		.acpi_match_table = ACPI_PTR(mxc6255_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.probe		= mxc6255_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.id_table	= mxc6255_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) module_i2c_driver(mxc6255_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MODULE_AUTHOR("Teodora Baluta <teodora.baluta@intel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MODULE_DESCRIPTION("MEMSIC MXC6255 orientation sensing accelerometer driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MODULE_LICENSE("GPL v2");