^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mCube MC3230 3-Axis Accelerometer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * IIO driver for mCube MC3230; 7-bit I2C address: 0x4c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define MC3230_REG_XOUT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define MC3230_REG_YOUT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MC3230_REG_ZOUT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define MC3230_REG_MODE 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MC3230_MODE_OPCON_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MC3230_MODE_OPCON_WAKE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MC3230_MODE_OPCON_STANDBY 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MC3230_REG_CHIP_ID 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MC3230_CHIP_ID 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MC3230_REG_PRODUCT_CODE 0x3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MC3230_PRODUCT_CODE 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * The accelerometer has one measurement range:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * -1.5g - +1.5g (8-bit, signed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * scale = (1.5 + 1.5) * 9.81 / (2^8 - 1) = 0.115411765
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static const int mc3230_nscale = 115411765;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MC3230_CHANNEL(reg, axis) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .type = IIO_ACCEL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .address = reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .modified = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .channel2 = IIO_MOD_##axis, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static const struct iio_chan_spec mc3230_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MC3230_CHANNEL(MC3230_REG_XOUT, X),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MC3230_CHANNEL(MC3230_REG_YOUT, Y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MC3230_CHANNEL(MC3230_REG_ZOUT, Z),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct mc3230_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int mc3230_set_opcon(struct mc3230_data *data, int opcon)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ret = i2c_smbus_read_byte_data(client, MC3230_REG_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) dev_err(&client->dev, "failed to read mode reg: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ret &= ~MC3230_MODE_OPCON_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ret |= opcon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ret = i2c_smbus_write_byte_data(client, MC3230_REG_MODE, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) dev_err(&client->dev, "failed to write mode reg: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int mc3230_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct mc3230_data *data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ret = i2c_smbus_read_byte_data(data->client, chan->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *val = sign_extend32(ret, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) *val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) *val2 = mc3230_nscale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return IIO_VAL_INT_PLUS_NANO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static const struct iio_info mc3230_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .read_raw = mc3230_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int mc3230_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct mc3230_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* First check chip-id and product-id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ret = i2c_smbus_read_byte_data(client, MC3230_REG_CHIP_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (ret != MC3230_CHIP_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return (ret < 0) ? ret : -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ret = i2c_smbus_read_byte_data(client, MC3230_REG_PRODUCT_CODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (ret != MC3230_PRODUCT_CODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return (ret < 0) ? ret : -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!indio_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_err(&client->dev, "iio allocation failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) data = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) i2c_set_clientdata(client, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) indio_dev->info = &mc3230_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) indio_dev->name = "mc3230";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) indio_dev->channels = mc3230_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) indio_dev->num_channels = ARRAY_SIZE(mc3230_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) ret = mc3230_set_opcon(data, MC3230_MODE_OPCON_WAKE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ret = iio_device_register(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev_err(&client->dev, "device_register failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) mc3230_set_opcon(data, MC3230_MODE_OPCON_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int mc3230_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct iio_dev *indio_dev = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) iio_device_unregister(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return mc3230_set_opcon(iio_priv(indio_dev), MC3230_MODE_OPCON_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static int mc3230_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct mc3230_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return mc3230_set_opcon(data, MC3230_MODE_OPCON_STANDBY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static int mc3230_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct mc3230_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) data = iio_priv(i2c_get_clientdata(to_i2c_client(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return mc3230_set_opcon(data, MC3230_MODE_OPCON_WAKE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static SIMPLE_DEV_PM_OPS(mc3230_pm_ops, mc3230_suspend, mc3230_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const struct i2c_device_id mc3230_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {"mc3230", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MODULE_DEVICE_TABLE(i2c, mc3230_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static struct i2c_driver mc3230_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .name = "mc3230",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .pm = &mc3230_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .probe = mc3230_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .remove = mc3230_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .id_table = mc3230_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) module_i2c_driver(mc3230_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MODULE_DESCRIPTION("mCube MC3230 3-Axis Accelerometer driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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