Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2010 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/iio/imu/adis.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define ADIS16201_STARTUP_DELAY_MS			220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define ADIS16201_FLASH_CNT				0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* Data Output Register Information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define ADIS16201_SUPPLY_OUT_REG			0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define ADIS16201_XACCL_OUT_REG				0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ADIS16201_YACCL_OUT_REG				0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ADIS16201_AUX_ADC_REG				0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ADIS16201_TEMP_OUT_REG				0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define ADIS16201_XINCL_OUT_REG				0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ADIS16201_YINCL_OUT_REG				0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /* Calibration Register Definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ADIS16201_XACCL_OFFS_REG			0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ADIS16201_YACCL_OFFS_REG			0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define ADIS16201_XACCL_SCALE_REG			0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ADIS16201_YACCL_SCALE_REG			0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define ADIS16201_XINCL_OFFS_REG			0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define ADIS16201_YINCL_OFFS_REG			0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define ADIS16201_XINCL_SCALE_REG			0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define ADIS16201_YINCL_SCALE_REG			0x1E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /* Alarm Register Definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define ADIS16201_ALM_MAG1_REG				0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define ADIS16201_ALM_MAG2_REG				0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define ADIS16201_ALM_SMPL1_REG				0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define ADIS16201_ALM_SMPL2_REG				0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define ADIS16201_ALM_CTRL_REG				0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define ADIS16201_AUX_DAC_REG				0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ADIS16201_GPIO_CTRL_REG				0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ADIS16201_SMPL_PRD_REG				0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) /* Operation, filter configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define ADIS16201_AVG_CNT_REG				0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define ADIS16201_SLP_CNT_REG				0x3A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /* Miscellaneous Control Register Definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define ADIS16201_MSC_CTRL_REG				0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define  ADIS16201_MSC_CTRL_SELF_TEST_EN		BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) /* Data-ready enable: 1 = enabled, 0 = disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define  ADIS16201_MSC_CTRL_DATA_RDY_EN			BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) /* Data-ready polarity: 1 = active high, 0 = active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define  ADIS16201_MSC_CTRL_ACTIVE_DATA_RDY_HIGH	BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define  ADIS16201_MSC_CTRL_DATA_RDY_DIO1		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) /* Diagnostics System Status Register Definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define ADIS16201_DIAG_STAT_REG				0x3C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define  ADIS16201_DIAG_STAT_ALARM2			BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define  ADIS16201_DIAG_STAT_ALARM1			BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define  ADIS16201_DIAG_STAT_SPI_FAIL_BIT		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define  ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) /* Power supply above 3.625 V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define  ADIS16201_DIAG_STAT_POWER_HIGH_BIT		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) /* Power supply below 2.975 V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define  ADIS16201_DIAG_STAT_POWER_LOW_BIT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) /* System Command Register Definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define ADIS16201_GLOB_CMD_REG				0x3E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define  ADIS16201_GLOB_CMD_SW_RESET			BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define  ADIS16201_GLOB_CMD_FACTORY_RESET		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define ADIS16201_ERROR_ACTIVE				BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) enum adis16201_scan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	ADIS16201_SCAN_ACC_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	ADIS16201_SCAN_ACC_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	ADIS16201_SCAN_INCLI_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	ADIS16201_SCAN_INCLI_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	ADIS16201_SCAN_SUPPLY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	ADIS16201_SCAN_AUX_ADC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	ADIS16201_SCAN_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static const u8 adis16201_addresses[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	[ADIS16201_SCAN_ACC_X] = ADIS16201_XACCL_OFFS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	[ADIS16201_SCAN_ACC_Y] = ADIS16201_YACCL_OFFS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	[ADIS16201_SCAN_INCLI_X] = ADIS16201_XINCL_OFFS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	[ADIS16201_SCAN_INCLI_Y] = ADIS16201_YINCL_OFFS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int adis16201_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			      struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			      int *val, int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			      long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct adis *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	int bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	s16 val16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	switch (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		return adis_single_conversion(indio_dev, chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 					      ADIS16201_ERROR_ACTIVE, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		case IIO_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			if (chan->channel == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			/* Voltage base units are mV hence 1.22 mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 				*val = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 				*val2 = 220000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			/* Voltage base units are mV hence 0.61 mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 				*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 				*val2 = 610000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		case IIO_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			*val = -470;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			*val2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		case IIO_ACCEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			 * IIO base unit for sensitivity of accelerometer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			 * is milli g.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			 * 1 LSB represents 0.244 mg.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			*val2 = IIO_G_TO_M_S_2(462400);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			return IIO_VAL_INT_PLUS_NANO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		case IIO_INCLI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			*val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			*val2 = 100000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	case IIO_CHAN_INFO_OFFSET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		 * The raw ADC value is 1278 when the temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		 * is 25 degrees and the scale factor per milli
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		 * degree celcius is -470.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		*val = 25000 / -470 - 1278;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	case IIO_CHAN_INFO_CALIBBIAS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		case IIO_ACCEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			bits = 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		case IIO_INCLI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			bits = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		addr = adis16201_addresses[chan->scan_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		ret = adis_read_reg_16(st, addr, &val16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		*val = sign_extend32(val16, bits - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int adis16201_write_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			       struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			       int val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			       int val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			       long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	struct adis *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	int m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (mask != IIO_CHAN_INFO_CALIBBIAS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	case IIO_ACCEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		m = GENMASK(11, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	case IIO_INCLI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		m = GENMASK(8, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	return adis_write_reg_16(st, adis16201_addresses[chan->scan_index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				 val & m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const struct iio_chan_spec adis16201_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT_REG, ADIS16201_SCAN_SUPPLY, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT_REG, ADIS16201_SCAN_TEMP, 0, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT_REG, ADIS16201_SCAN_ACC_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT_REG, ADIS16201_SCAN_ACC_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC_REG, ADIS16201_SCAN_AUX_ADC, 0, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT_REG, ADIS16201_SCAN_INCLI_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	ADIS_INCLI_CHAN(Y, ADIS16201_YINCL_OUT_REG, ADIS16201_SCAN_INCLI_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	IIO_CHAN_SOFT_TIMESTAMP(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct iio_info adis16201_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	.read_raw = adis16201_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.write_raw = adis16201_write_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.update_scan_mode = adis_update_scan_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static const char * const adis16201_status_error_msgs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	[ADIS16201_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	[ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	[ADIS16201_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	[ADIS16201_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static const struct adis_timeout adis16201_timeouts = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	.reset_ms = ADIS16201_STARTUP_DELAY_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	.sw_reset_ms = ADIS16201_STARTUP_DELAY_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	.self_test_ms = ADIS16201_STARTUP_DELAY_MS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const struct adis_data adis16201_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	.read_delay = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	.msc_ctrl_reg = ADIS16201_MSC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	.glob_cmd_reg = ADIS16201_GLOB_CMD_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	.diag_stat_reg = ADIS16201_DIAG_STAT_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	.self_test_mask = ADIS16201_MSC_CTRL_SELF_TEST_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	.self_test_reg = ADIS16201_MSC_CTRL_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	.self_test_no_autoclear = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.timeouts = &adis16201_timeouts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	.status_error_msgs = adis16201_status_error_msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	.status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		BIT(ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		BIT(ADIS16201_DIAG_STAT_POWER_HIGH_BIT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		BIT(ADIS16201_DIAG_STAT_POWER_LOW_BIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int adis16201_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	struct adis *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	indio_dev->name = spi->dev.driver->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	indio_dev->info = &adis16201_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	indio_dev->channels = adis16201_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	indio_dev->num_channels = ARRAY_SIZE(adis16201_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	ret = adis_init(st, indio_dev, spi, &adis16201_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	ret = adis_initial_startup(st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	return devm_iio_device_register(&spi->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static struct spi_driver adis16201_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		.name = "adis16201",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	.probe = adis16201_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) module_spi_driver(adis16201_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MODULE_DESCRIPTION("Analog Devices ADIS16201 Dual-Axis Digital Inclinometer and Accelerometer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MODULE_ALIAS("spi:adis16201");