^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * IDE Chipset driver for the Compaq TriFlex IDE controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Known to work with the Compaq Workstation 5x00 series.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2002 Hewlett-Packard Development Group, L.P.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Author: Torben Mathiasen <torben.mathiasen@hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Loosely based on the piix & svwks drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Documentation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Not publicly available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/ide.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DRV_NAME "triflex"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static void triflex_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct pci_dev *dev = to_pci_dev(hwif->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u32 triflex_timings = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u16 timing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 channel_offset = hwif->channel ? 0x74 : 0x70, unit = drive->dn & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) pci_read_config_dword(dev, channel_offset, &triflex_timings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) switch (drive->dma_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) case XFER_MW_DMA_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) timing = 0x0103;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) case XFER_MW_DMA_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) timing = 0x0203;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) case XFER_MW_DMA_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) timing = 0x0808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) case XFER_SW_DMA_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) case XFER_SW_DMA_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) case XFER_SW_DMA_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) timing = 0x0f0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) case XFER_PIO_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) timing = 0x0202;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) case XFER_PIO_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) timing = 0x0204;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) case XFER_PIO_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) timing = 0x0404;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) case XFER_PIO_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) timing = 0x0508;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) case XFER_PIO_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) timing = 0x0808;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) triflex_timings &= ~(0xFFFF << (16 * unit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) triflex_timings |= (timing << (16 * unit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) pci_write_config_dword(dev, channel_offset, triflex_timings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static void triflex_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) drive->dma_mode = drive->pio_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) triflex_set_mode(hwif, drive);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static const struct ide_port_ops triflex_port_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .set_pio_mode = triflex_set_pio_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .set_dma_mode = triflex_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static const struct ide_port_info triflex_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .port_ops = &triflex_port_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .pio_mask = ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .swdma_mask = ATA_SWDMA2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .mwdma_mask = ATA_MWDMA2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return ide_pci_init_one(dev, &triflex_device, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const struct pci_device_id triflex_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) { PCI_VDEVICE(COMPAQ, PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE), 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) { 0, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MODULE_DEVICE_TABLE(pci, triflex_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int triflex_ide_pci_suspend(struct pci_dev *dev, pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * We must not disable or powerdown the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * APM bios refuses to suspend if IDE is not accessible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) pci_save_state(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define triflex_ide_pci_suspend NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static struct pci_driver triflex_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .name = "TRIFLEX_IDE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .id_table = triflex_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .probe = triflex_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .remove = ide_pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .suspend = triflex_ide_pci_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .resume = ide_pci_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int __init triflex_ide_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return ide_pci_register_driver(&triflex_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static void __exit triflex_ide_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) pci_unregister_driver(&triflex_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) module_init(triflex_ide_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) module_exit(triflex_ide_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_AUTHOR("Torben Mathiasen");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_DESCRIPTION("PCI driver module for Compaq Triflex IDE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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