^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 1995-1998 Linus Torvalds & author (see below)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Principal Author: mlord@pobox.com (Mark Lord)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * See linux/MAINTAINERS for address of current maintainer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This file provides support for disabling the buggy read-ahead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * mode of the RZ1000 IDE chipset, commonly used on Intel motherboards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Dunno if this fixes both ports, or only the primary port (?).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/ide.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DRV_NAME "rz1000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int rz1000_disable_readahead(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) if (!pci_read_config_word (dev, 0x40, ®) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) !pci_write_config_word(dev, 0x40, reg & 0xdfff)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) printk(KERN_INFO "%s: disabled chipset read-ahead "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) "(buggy RZ1000/RZ1001)\n", pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) printk(KERN_INFO "%s: serialized, disabled unmasking "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) "(buggy RZ1000/RZ1001)\n", pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const struct ide_port_info rz1000_chipset = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .host_flags = IDE_HFLAG_NO_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct ide_port_info d = rz1000_chipset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) rc = pci_enable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (rz1000_disable_readahead(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) d.host_flags |= IDE_HFLAG_SERIALIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) d.host_flags |= IDE_HFLAG_NO_UNMASK_IRQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return ide_pci_init_one(dev, &d, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static void rz1000_remove(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ide_pci_remove(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static const struct pci_device_id rz1000_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_RZ1000), 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_RZ1001), 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { 0, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MODULE_DEVICE_TABLE(pci, rz1000_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static struct pci_driver rz1000_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .name = "RZ1000_IDE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .id_table = rz1000_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .probe = rz1000_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .remove = rz1000_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int __init rz1000_ide_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return ide_pci_register_driver(&rz1000_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static void __exit rz1000_ide_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pci_unregister_driver(&rz1000_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) module_init(rz1000_ide_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) module_exit(rz1000_ide_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MODULE_AUTHOR("Andre Hedrick");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MODULE_DESCRIPTION("PCI driver module for RZ1000 IDE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)