^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * support for probing IDE PCI devices in the PCI bus order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 1995-1998 Mark Lord
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * May be copied or modified under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/ide.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Module interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int pre_init = 1; /* Before first ordered IDE scan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static LIST_HEAD(ide_pci_drivers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * __ide_pci_register_driver - attach IDE driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * @driver: pci driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @module: owner module of the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Registers a driver with the IDE layer. The IDE layer arranges that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * boot time setup is done in the expected device order and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * hands the controllers off to the core PCI code to do the rest of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * the work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Returns are the same as for pci_register_driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int __ide_pci_register_driver(struct pci_driver *driver, struct module *module,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) const char *mod_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) if (!pre_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return __pci_register_driver(driver, module, mod_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) driver->driver.owner = module;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) list_add_tail(&driver->node, &ide_pci_drivers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * ide_scan_pcidev - find an IDE driver for a device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * @dev: PCI device to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Look for an IDE driver to handle the device we are considering.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * This is only used during boot up to get the ordering correct. After
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * boot up the pci layer takes over the job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int __init ide_scan_pcidev(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct list_head *l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct pci_driver *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) list_for_each(l, &ide_pci_drivers) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) d = list_entry(l, struct pci_driver, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (d->id_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) const struct pci_device_id *id =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) pci_match_id(d->id_table, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (id != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) pci_assign_irq(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ret = d->probe(dev, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) dev->driver = d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) pci_dev_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * ide_scan_pcibus - perform the initial IDE driver scan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Perform the initial bus rather than driver ordered scan of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * PCI drivers. After this all IDE pci handling becomes standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * module ordering not traditionally ordered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int __init ide_scan_pcibus(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct pci_dev *dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct pci_driver *d, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pre_init = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) for_each_pci_dev(dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ide_scan_pcidev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Hand the drivers over to the PCI layer now we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * are post init.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) list_for_each_entry_safe(d, tmp, &ide_pci_drivers, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) list_del(&d->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (__pci_register_driver(d, d->driver.owner,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) d->driver.mod_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) printk(KERN_ERR "%s: failed to register %s driver\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) __func__, d->driver.mod_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) device_initcall(ide_scan_pcibus);