Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Copyright (C) 1996  Linus Torvalds & author (see below)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/ide.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define DRV_NAME "dtc2278"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * Changing this #undef to #define may solve start up problems in some systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #undef ALWAYS_SET_DTC2278_PIO_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * From: andy@cercle.cts.com (Dyan Wile)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * Below is a patch for DTC-2278 - alike software-programmable controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * The code enables the secondary IDE controller and the PIO4 (3?) timings on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * the primary (EIDE). You may probably have to enable the 32-bit support to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * get the full speed. You better get the disk interrupts disabled ( hdparm -u0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * /dev/hd.. ) for the drives connected to the EIDE interface. (I get my
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * filesystem  corrupted with -u1, but under heavy disk load only :-)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * This card is now forced to use the "serialize" feature,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * and irq-unmasking is disallowed.  If io_32bit is enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * it must be done for BOTH drives on each interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * This code was written for the DTC2278E, but might work with any of these:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * DTC2278S has only a single IDE interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * DTC2278D has two IDE interfaces and is otherwise identical to the S version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * DTC2278E also has serial ports and a printer port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * DTC2278EB: has onboard BIOS, and "works like a charm" -- Kent Bradford <kent@theory.caltech.edu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * There may be a fourth controller type. The S and D versions use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * Winbond chip, and I think the E version does also.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static void sub22 (char b, char c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	for(i = 0; i < 3; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		inb(0x3f6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		outb_p(b,0xb0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		inb(0x3f6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		outb_p(c,0xb4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		inb(0x3f6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		if(inb(0xb4) == c) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			outb_p(7,0xb0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			inb(0x3f6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			return;	/* success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static DEFINE_SPINLOCK(dtc2278_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static void dtc2278_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if (drive->pio_mode >= XFER_PIO_3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		spin_lock_irqsave(&dtc2278_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		 * This enables PIO mode4 (3?) on the first interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		sub22(1,0xc3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		sub22(0,0xa0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		spin_unlock_irqrestore(&dtc2278_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		/* we don't know how to set it back again.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		/* Actually we do - there is a data sheet available for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		   Winbond but does anyone actually care */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static const struct ide_port_ops dtc2278_port_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	.set_pio_mode		= dtc2278_set_pio_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static const struct ide_port_info dtc2278_port_info __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.name			= DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.chipset		= ide_dtc2278,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.port_ops		= &dtc2278_port_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.host_flags		= IDE_HFLAG_SERIALIZE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 				  IDE_HFLAG_NO_UNMASK_IRQS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				  IDE_HFLAG_IO_32BIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				  /* disallow ->io_32bit changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				  IDE_HFLAG_NO_IO_32BIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				  IDE_HFLAG_NO_DMA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				  IDE_HFLAG_DTC2278,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.pio_mask		= ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int __init dtc2278_probe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	 * This enables the second interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	outb_p(4,0xb0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	inb(0x3f6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	outb_p(0x20,0xb4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	inb(0x3f6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #ifdef ALWAYS_SET_DTC2278_PIO_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	 * This enables PIO mode4 (3?) on the first interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	 * and may solve start-up problems for some people.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	sub22(1,0xc3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	sub22(0,0xa0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return ide_legacy_device_add(&dtc2278_port_info, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static bool probe_dtc2278;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) module_param_named(probe, probe_dtc2278, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MODULE_PARM_DESC(probe, "probe for DTC2278xx chipsets");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int __init dtc2278_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (probe_dtc2278 == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (dtc2278_probe()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		printk(KERN_ERR "dtc2278: ide interfaces already in use!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) module_init(dtc2278_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MODULE_AUTHOR("See Local File");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MODULE_DESCRIPTION("support of DTC-2278 VLB IDE chipsets");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MODULE_LICENSE("GPL");