^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * I2C multiplexer using a single register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2015 Freescale Semiconductor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * York Sun <yorksun@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/i2c-mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_data/i2c-mux-reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct regmux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct i2c_mux_reg_platform_data data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) if (!mux->data.reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * Write to the register, followed by a read to ensure the write is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * completed on a "posted" bus, for example PCI or write buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * The endianness of reading doesn't matter and the return data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * is not used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) switch (mux->data.reg_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (mux->data.little_endian)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) iowrite32(chan_id, mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) iowrite32be(chan_id, mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (!mux->data.write_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ioread32(mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (mux->data.little_endian)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) iowrite16(chan_id, mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) iowrite16be(chan_id, mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (!mux->data.write_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ioread16(mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) iowrite8(chan_id, mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (!mux->data.write_only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ioread8(mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int i2c_mux_reg_select(struct i2c_mux_core *muxc, u32 chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct regmux *mux = i2c_mux_priv(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return i2c_mux_reg_set(mux, chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int i2c_mux_reg_deselect(struct i2c_mux_core *muxc, u32 chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct regmux *mux = i2c_mux_priv(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (mux->data.idle_in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return i2c_mux_reg_set(mux, mux->data.idle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int i2c_mux_reg_probe_dt(struct regmux *mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct device_node *adapter_np, *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct i2c_adapter *adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned *values;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) adapter_np = of_parse_phandle(np, "i2c-parent", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (!adapter_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) dev_err(&pdev->dev, "Cannot parse i2c-parent\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) adapter = of_find_i2c_adapter_by_node(adapter_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) of_node_put(adapter_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (!adapter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) mux->data.parent = i2c_adapter_id(adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) put_device(&adapter->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) mux->data.n_values = of_get_child_count(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (of_property_read_bool(np, "little-endian")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mux->data.little_endian = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) } else if (of_property_read_bool(np, "big-endian")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) mux->data.little_endian = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) defined(__LITTLE_ENDIAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) mux->data.little_endian = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) defined(__BIG_ENDIAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) mux->data.little_endian = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #error Endianness not defined?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) mux->data.write_only = of_property_read_bool(np, "write-only");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) values = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) mux->data.n_values, sizeof(*mux->data.values),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!values)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) for_each_child_of_node(np, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) of_property_read_u32(child, "reg", values + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) mux->data.values = values;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (!of_property_read_u32(np, "idle-state", &mux->data.idle))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) mux->data.idle_in_use = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* map address from "reg" if exists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (of_address_to_resource(np, 0, &res) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) mux->data.reg_size = resource_size(&res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) mux->data.reg = devm_ioremap_resource(&pdev->dev, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (IS_ERR(mux->data.reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return PTR_ERR(mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int i2c_mux_reg_probe_dt(struct regmux *mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int i2c_mux_reg_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct i2c_mux_core *muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct regmux *mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct i2c_adapter *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned int class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int i, ret, nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) mux = devm_kzalloc(&pdev->dev, sizeof(*mux), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (!mux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (dev_get_platdata(&pdev->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) memcpy(&mux->data, dev_get_platdata(&pdev->dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) sizeof(mux->data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ret = i2c_mux_reg_probe_dt(mux, pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return dev_err_probe(&pdev->dev, ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) "Error parsing device tree");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) parent = i2c_get_adapter(mux->data.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (!parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (!mux->data.reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) dev_info(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) "Register not set, using platform resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) mux->data.reg_size = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) mux->data.reg = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (IS_ERR(mux->data.reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) ret = PTR_ERR(mux->data.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) goto err_put_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (mux->data.reg_size != 4 && mux->data.reg_size != 2 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) mux->data.reg_size != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) dev_err(&pdev->dev, "Invalid register size\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) goto err_put_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) muxc = i2c_mux_alloc(parent, &pdev->dev, mux->data.n_values, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) i2c_mux_reg_select, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (!muxc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) goto err_put_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) muxc->priv = mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) platform_set_drvdata(pdev, muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (mux->data.idle_in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) muxc->deselect = i2c_mux_reg_deselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) for (i = 0; i < mux->data.n_values; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) nr = mux->data.base_nr ? (mux->data.base_nr + i) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) class = mux->data.classes ? mux->data.classes[i] : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ret = i2c_mux_add_adapter(muxc, nr, mux->data.values[i], class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) goto err_del_mux_adapters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) dev_dbg(&pdev->dev, "%d port mux on %s adapter\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) mux->data.n_values, muxc->parent->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) err_del_mux_adapters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) i2c_mux_del_adapters(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) err_put_parent:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) i2c_put_adapter(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int i2c_mux_reg_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct i2c_mux_core *muxc = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) i2c_mux_del_adapters(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) i2c_put_adapter(muxc->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static const struct of_device_id i2c_mux_reg_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) { .compatible = "i2c-mux-reg", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MODULE_DEVICE_TABLE(of, i2c_mux_reg_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static struct platform_driver i2c_mux_reg_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .probe = i2c_mux_reg_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .remove = i2c_mux_reg_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .name = "i2c-mux-reg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .of_match_table = of_match_ptr(i2c_mux_reg_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) module_platform_driver(i2c_mux_reg_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MODULE_DESCRIPTION("Register-based I2C multiplexer driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MODULE_ALIAS("platform:i2c-mux-reg");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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