Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * drivers/i2c/muxes/i2c-mux-mlxcpld.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2016 Mellanox Technologies. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2016 Michael Shych <michaels@mellanox.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * modification, are permitted provided that the following conditions are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *    notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * 2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *    notice, this list of conditions and the following disclaimer in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *    documentation and/or other materials provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * 3. Neither the names of the copyright holders nor the names of its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *    contributors may be used to endorse or promote products derived from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *    this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * Alternatively, this software may be distributed under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * GNU General Public License ("GPL") version 2 as published by the Free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <linux/i2c-mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #include <linux/platform_data/x86/mlxcpld.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define CPLD_MUX_MAX_NCHANS	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) /* mlxcpld_mux - mux control structure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * @last_chan - last register value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * @client - I2C device client
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) struct mlxcpld_mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u8 last_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) /* MUX logic description.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * Driver can support different mux control logic, according to CPLD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * Connectivity schema.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * i2c-mlxcpld                                 Digital               Analog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  * *--------*                                 * -> mux1 (virt bus2) -> mux -> |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * | I2CLPC | i2c physical                    * -> mux2 (virt bus3) -> mux -> |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * | bridge | bus 1                 *---------*                               |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  * | logic  |---------------------> * mux reg *                               |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  * | in CPLD|                       *---------*                               |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * *--------*   i2c-mux-mlxpcld          ^    * -> muxn (virt busn) -> mux -> |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  *     |        driver                   |                                    |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  *     |        *---------------*        |                              Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  *     |        * CPLD (i2c bus)* select |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  *     |        * registers for *--------*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  *     |        * mux selection * deselect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  *     |        *---------------*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  *     |                 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * <-------->     <----------->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * i2c cntrl      Board cntrl reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  * reg space      space (mux select,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  *                IO, LED, WD, info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static const struct i2c_device_id mlxcpld_mux_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	{ "mlxcpld_mux_module", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) MODULE_DEVICE_TABLE(i2c, mlxcpld_mux_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) /* Write to mux register. Don't use i2c_transfer() and i2c_smbus_xfer()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * for this as they will try to lock adapter a second time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static int mlxcpld_mux_reg_write(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				 struct i2c_client *client, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct mlxcpld_mux_plat_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	union i2c_smbus_data data = { .byte = val };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	return __i2c_smbus_xfer(adap, client->addr, client->flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 				I2C_SMBUS_WRITE, pdata->sel_reg_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				I2C_SMBUS_BYTE_DATA, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int mlxcpld_mux_select_chan(struct i2c_mux_core *muxc, u32 chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct mlxcpld_mux *data = i2c_mux_priv(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u8 regval = chan + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	/* Only select the channel if its different from the last channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (data->last_chan != regval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		err = mlxcpld_mux_reg_write(muxc->parent, client, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		data->last_chan = err < 0 ? 0 : regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int mlxcpld_mux_deselect(struct i2c_mux_core *muxc, u32 chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct mlxcpld_mux *data = i2c_mux_priv(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct i2c_client *client = data->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	/* Deselect active channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	data->last_chan = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return mlxcpld_mux_reg_write(muxc->parent, client, data->last_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Probe/reomove functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int mlxcpld_mux_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			     const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	struct i2c_adapter *adap = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct mlxcpld_mux_plat_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	struct i2c_mux_core *muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	int num, force;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	struct mlxcpld_mux *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	muxc = i2c_mux_alloc(adap, &client->dev, CPLD_MUX_MAX_NCHANS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			     sizeof(*data), 0, mlxcpld_mux_select_chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			     mlxcpld_mux_deselect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	if (!muxc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	data = i2c_mux_priv(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	i2c_set_clientdata(client, muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	data->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	data->last_chan = 0; /* force the first selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	/* Create an adapter for each channel. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	for (num = 0; num < CPLD_MUX_MAX_NCHANS; num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		if (num >= pdata->num_adaps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			/* discard unconfigured channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		force = pdata->adap_ids[num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		err = i2c_mux_add_adapter(muxc, force, num, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			goto virt_reg_failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) virt_reg_failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	i2c_mux_del_adapters(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int mlxcpld_mux_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	i2c_mux_del_adapters(muxc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static struct i2c_driver mlxcpld_mux_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		.name	= "mlxcpld-mux",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	.probe		= mlxcpld_mux_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	.remove		= mlxcpld_mux_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.id_table	= mlxcpld_mux_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) module_i2c_driver(mlxcpld_mux_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MODULE_AUTHOR("Michael Shych (michaels@mellanox.com)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MODULE_DESCRIPTION("Mellanox I2C-CPLD-MUX driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MODULE_LICENSE("Dual BSD/GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MODULE_ALIAS("platform:i2c-mux-mlxcpld");