Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Multiplexed I2C bus driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2009-2010 NSN GmbH & Co KG <michael.lawnick.ext@nsn.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Simplifies access to complex multiplexed I2C bus topologies, by presenting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * each multiplexed bus segment as an additional I2C adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Supports multi-level mux'ing (mux behind a mux).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Based on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *	i2c-virt.c from Kumar Gala <galak@kernel.crashing.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *	i2c-virtual.c from Ken Harrenstien, Copyright (c) 2004 Google, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *	i2c-virtual.c from Brian Kuschak <bkuschak@yahoo.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/i2c-mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /* multiplexer per channel data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) struct i2c_mux_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct i2c_adapter adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct i2c_algorithm algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct i2c_mux_core *muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u32 chan_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static int __i2c_mux_master_xfer(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 				 struct i2c_msg msgs[], int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct i2c_mux_priv *priv = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct i2c_mux_core *muxc = priv->muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct i2c_adapter *parent = muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	/* Switch to the right mux port and perform the transfer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	ret = muxc->select(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		ret = __i2c_transfer(parent, msgs, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	if (muxc->deselect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		muxc->deselect(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static int i2c_mux_master_xfer(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			       struct i2c_msg msgs[], int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct i2c_mux_priv *priv = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct i2c_mux_core *muxc = priv->muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct i2c_adapter *parent = muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	/* Switch to the right mux port and perform the transfer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	ret = muxc->select(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		ret = i2c_transfer(parent, msgs, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	if (muxc->deselect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		muxc->deselect(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static int __i2c_mux_smbus_xfer(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 				u16 addr, unsigned short flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 				char read_write, u8 command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 				int size, union i2c_smbus_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct i2c_mux_priv *priv = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct i2c_mux_core *muxc = priv->muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	struct i2c_adapter *parent = muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/* Select the right mux port and perform the transfer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	ret = muxc->select(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		ret = __i2c_smbus_xfer(parent, addr, flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 				       read_write, command, size, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (muxc->deselect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		muxc->deselect(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static int i2c_mux_smbus_xfer(struct i2c_adapter *adap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			      u16 addr, unsigned short flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			      char read_write, u8 command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			      int size, union i2c_smbus_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct i2c_mux_priv *priv = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct i2c_mux_core *muxc = priv->muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct i2c_adapter *parent = muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	/* Select the right mux port and perform the transfer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	ret = muxc->select(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (ret >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		ret = i2c_smbus_xfer(parent, addr, flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 				     read_write, command, size, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if (muxc->deselect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		muxc->deselect(muxc, priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Return the parent's functionality */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static u32 i2c_mux_functionality(struct i2c_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct i2c_mux_priv *priv = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct i2c_adapter *parent = priv->muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	return parent->algo->functionality(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* Return all parent classes, merged */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static unsigned int i2c_mux_parent_classes(struct i2c_adapter *parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	unsigned int class = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		class |= parent->class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		parent = i2c_parent_is_i2c_adapter(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	} while (parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static void i2c_mux_lock_bus(struct i2c_adapter *adapter, unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct i2c_mux_priv *priv = adapter->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	struct i2c_adapter *parent = priv->muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	rt_mutex_lock_nested(&parent->mux_lock, i2c_adapter_depth(adapter));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (!(flags & I2C_LOCK_ROOT_ADAPTER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	i2c_lock_bus(parent, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int i2c_mux_trylock_bus(struct i2c_adapter *adapter, unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct i2c_mux_priv *priv = adapter->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	struct i2c_adapter *parent = priv->muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (!rt_mutex_trylock(&parent->mux_lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return 0;	/* mux_lock not locked, failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (!(flags & I2C_LOCK_ROOT_ADAPTER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return 1;	/* we only want mux_lock, success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	if (i2c_trylock_bus(parent, flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		return 1;	/* parent locked too, success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	rt_mutex_unlock(&parent->mux_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return 0;		/* parent not locked, failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static void i2c_mux_unlock_bus(struct i2c_adapter *adapter, unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	struct i2c_mux_priv *priv = adapter->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct i2c_adapter *parent = priv->muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	if (flags & I2C_LOCK_ROOT_ADAPTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		i2c_unlock_bus(parent, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	rt_mutex_unlock(&parent->mux_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void i2c_parent_lock_bus(struct i2c_adapter *adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 				unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct i2c_mux_priv *priv = adapter->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct i2c_adapter *parent = priv->muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	rt_mutex_lock_nested(&parent->mux_lock, i2c_adapter_depth(adapter));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	i2c_lock_bus(parent, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int i2c_parent_trylock_bus(struct i2c_adapter *adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 				  unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	struct i2c_mux_priv *priv = adapter->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct i2c_adapter *parent = priv->muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (!rt_mutex_trylock(&parent->mux_lock))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		return 0;	/* mux_lock not locked, failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	if (i2c_trylock_bus(parent, flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		return 1;	/* parent locked too, success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	rt_mutex_unlock(&parent->mux_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	return 0;		/* parent not locked, failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static void i2c_parent_unlock_bus(struct i2c_adapter *adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				  unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	struct i2c_mux_priv *priv = adapter->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	struct i2c_adapter *parent = priv->muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	i2c_unlock_bus(parent, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	rt_mutex_unlock(&parent->mux_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct i2c_adapter *i2c_root_adapter(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct device *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct i2c_adapter *i2c_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	 * Walk up the device tree to find an i2c adapter, indicating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	 * that this is an i2c client device. Check all ancestors to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	 * handle mfd devices etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	for (i2c = dev; i2c; i2c = i2c->parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		if (i2c->type == &i2c_adapter_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (!i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	/* Continue up the tree to find the root i2c adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	i2c_root = to_i2c_adapter(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	while (i2c_parent_is_i2c_adapter(i2c_root))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		i2c_root = i2c_parent_is_i2c_adapter(i2c_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	return i2c_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) EXPORT_SYMBOL_GPL(i2c_root_adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct i2c_mux_core *i2c_mux_alloc(struct i2c_adapter *parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 				   struct device *dev, int max_adapters,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 				   int sizeof_priv, u32 flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 				   int (*select)(struct i2c_mux_core *, u32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 				   int (*deselect)(struct i2c_mux_core *, u32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	struct i2c_mux_core *muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	muxc = devm_kzalloc(dev, struct_size(muxc, adapter, max_adapters)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 			    + sizeof_priv, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (!muxc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	if (sizeof_priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		muxc->priv = &muxc->adapter[max_adapters];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	muxc->parent = parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	muxc->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	if (flags & I2C_MUX_LOCKED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		muxc->mux_locked = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (flags & I2C_MUX_ARBITRATOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		muxc->arbitrator = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (flags & I2C_MUX_GATE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		muxc->gate = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	muxc->select = select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	muxc->deselect = deselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	muxc->max_adapters = max_adapters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	return muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) EXPORT_SYMBOL_GPL(i2c_mux_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static const struct i2c_lock_operations i2c_mux_lock_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	.lock_bus =    i2c_mux_lock_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	.trylock_bus = i2c_mux_trylock_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	.unlock_bus =  i2c_mux_unlock_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static const struct i2c_lock_operations i2c_parent_lock_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	.lock_bus =    i2c_parent_lock_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	.trylock_bus = i2c_parent_trylock_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	.unlock_bus =  i2c_parent_unlock_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int i2c_mux_add_adapter(struct i2c_mux_core *muxc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 			u32 force_nr, u32 chan_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			unsigned int class)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	struct i2c_adapter *parent = muxc->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	struct i2c_mux_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	char symlink_name[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	if (muxc->num_adapters >= muxc->max_adapters) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		dev_err(muxc->dev, "No room for more i2c-mux adapters\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	/* Set up private adapter data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	priv->muxc = muxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	priv->chan_id = chan_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	/* Need to do algo dynamically because we don't know ahead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	 * of time what sort of physical adapter we'll be dealing with.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	if (parent->algo->master_xfer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		if (muxc->mux_locked)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 			priv->algo.master_xfer = i2c_mux_master_xfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 			priv->algo.master_xfer = __i2c_mux_master_xfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	if (parent->algo->master_xfer_atomic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		priv->algo.master_xfer_atomic = priv->algo.master_xfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	if (parent->algo->smbus_xfer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		if (muxc->mux_locked)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			priv->algo.smbus_xfer = i2c_mux_smbus_xfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 			priv->algo.smbus_xfer = __i2c_mux_smbus_xfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	if (parent->algo->smbus_xfer_atomic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		priv->algo.smbus_xfer_atomic = priv->algo.smbus_xfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	priv->algo.functionality = i2c_mux_functionality;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	/* Now fill out new adapter structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	snprintf(priv->adap.name, sizeof(priv->adap.name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		 "i2c-%d-mux (chan_id %d)", i2c_adapter_id(parent), chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	priv->adap.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	priv->adap.algo = &priv->algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	priv->adap.algo_data = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	priv->adap.dev.parent = &parent->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	priv->adap.retries = parent->retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	priv->adap.timeout = parent->timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	priv->adap.quirks = parent->quirks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	if (muxc->mux_locked)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		priv->adap.lock_ops = &i2c_mux_lock_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		priv->adap.lock_ops = &i2c_parent_lock_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	/* Sanity check on class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	if (i2c_mux_parent_classes(parent) & class)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		dev_err(&parent->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 			"Segment %d behind mux can't share classes with ancestors\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 			chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		priv->adap.class = class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	 * Try to populate the mux adapter's of_node, expands to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	 * nothing if !CONFIG_OF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (muxc->dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		struct device_node *dev_node = muxc->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		struct device_node *mux_node, *child = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		if (muxc->arbitrator)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			mux_node = of_get_child_by_name(dev_node, "i2c-arb");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		else if (muxc->gate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 			mux_node = of_get_child_by_name(dev_node, "i2c-gate");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			mux_node = of_get_child_by_name(dev_node, "i2c-mux");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		if (mux_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 			/* A "reg" property indicates an old-style DT entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 			if (!of_property_read_u32(mux_node, "reg", &reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 				of_node_put(mux_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 				mux_node = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		if (!mux_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 			mux_node = of_node_get(dev_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		else if (muxc->arbitrator || muxc->gate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 			child = of_node_get(mux_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		if (!child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 			for_each_child_of_node(mux_node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 				ret = of_property_read_u32(child, "reg", &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 				if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 					continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 				if (chan_id == reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 					break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		priv->adap.dev.of_node = child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		of_node_put(mux_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	 * Associate the mux channel with an ACPI node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	if (has_acpi_companion(muxc->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		acpi_preset_companion(&priv->adap.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 				      ACPI_COMPANION(muxc->dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 				      chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	if (force_nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 		priv->adap.nr = force_nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		ret = i2c_add_numbered_adapter(&priv->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 			dev_err(&parent->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 				"failed to add mux-adapter %u as bus %u (error=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 				chan_id, force_nr, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 			goto err_free_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		ret = i2c_add_adapter(&priv->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 			dev_err(&parent->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 				"failed to add mux-adapter %u (error=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 				chan_id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 			goto err_free_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	WARN(sysfs_create_link(&priv->adap.dev.kobj, &muxc->dev->kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 			       "mux_device"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	     "can't create symlink to mux device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	snprintf(symlink_name, sizeof(symlink_name), "channel-%u", chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	WARN(sysfs_create_link(&muxc->dev->kobj, &priv->adap.dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 			       symlink_name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	     "can't create symlink to channel %u\n", chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	dev_info(&parent->dev, "Added multiplexed i2c bus %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 		 i2c_adapter_id(&priv->adap));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	muxc->adapter[muxc->num_adapters++] = &priv->adap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) err_free_priv:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) EXPORT_SYMBOL_GPL(i2c_mux_add_adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) void i2c_mux_del_adapters(struct i2c_mux_core *muxc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	char symlink_name[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	while (muxc->num_adapters) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		struct i2c_adapter *adap = muxc->adapter[--muxc->num_adapters];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 		struct i2c_mux_priv *priv = adap->algo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		struct device_node *np = adap->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 		muxc->adapter[muxc->num_adapters] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		snprintf(symlink_name, sizeof(symlink_name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 			 "channel-%u", priv->chan_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 		sysfs_remove_link(&muxc->dev->kobj, symlink_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 		sysfs_remove_link(&priv->adap.dev.kobj, "mux_device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 		i2c_del_adapter(adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) EXPORT_SYMBOL_GPL(i2c_mux_del_adapters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) MODULE_DESCRIPTION("I2C driver for multiplexed I2C busses");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) MODULE_LICENSE("GPL v2");