^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Cavium ThunderX i2c driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2015,2016 Cavium Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Authors: Fred Martin <fmartin@caviumnetworks.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Jan Glauber <jglauber@cavium.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/i2c-smbus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "i2c-octeon-core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DRV_NAME "i2c-thunderx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PCI_DEVICE_ID_THUNDER_TWSI 0xa012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SYS_FREQ_DEFAULT 700000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define TWSI_INT_ENA_W1C 0x1028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define TWSI_INT_ENA_W1S 0x1030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Enable the CORE interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * The interrupt will be asserted when there is non-STAT_IDLE state in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * SW_TWSI_EOP_TWSI_STAT register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static void thunder_i2c_int_enable(struct octeon_i2c *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) i2c->twsi_base + TWSI_INT_ENA_W1S);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Disable the CORE interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static void thunder_i2c_int_disable(struct octeon_i2c *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) i2c->twsi_base + TWSI_INT_ENA_W1C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) i2c->twsi_base + TWSI_INT_ENA_W1S);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static void thunder_i2c_hlc_int_disable(struct octeon_i2c *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) i2c->twsi_base + TWSI_INT_ENA_W1C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static u32 thunderx_i2c_functionality(struct i2c_adapter *adap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_SMBUS_BLOCK_PROC_CALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static const struct i2c_algorithm thunderx_i2c_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .master_xfer = octeon_i2c_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .functionality = thunderx_i2c_functionality,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static const struct i2c_adapter thunderx_i2c_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .name = "ThunderX adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .algo = &thunderx_i2c_algo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (acpi_disabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* DT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) i2c->clk = clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (IS_ERR(i2c->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) i2c->clk = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) goto skip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ret = clk_prepare_enable(i2c->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) goto skip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) i2c->sys_freq = clk_get_rate(i2c->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* ACPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) device_property_read_u32(dev, "sclk", &i2c->sys_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) skip:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (!i2c->sys_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) i2c->sys_freq = SYS_FREQ_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static void thunder_i2c_clock_disable(struct device *dev, struct clk *clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (!clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) clk_disable_unprepare(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int thunder_i2c_smbus_setup_of(struct octeon_i2c *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct i2c_client *ara;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (!node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) i2c->alert_data.irq = irq_of_parse_and_map(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (!i2c->alert_data.irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ara = i2c_new_smbus_alert_device(&i2c->adap, &i2c->alert_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (IS_ERR(ara))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return PTR_ERR(ara);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) i2c->ara = ara;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int thunder_i2c_smbus_setup(struct octeon_i2c *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* TODO: ACPI support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (!acpi_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return thunder_i2c_smbus_setup_of(i2c, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static void thunder_i2c_smbus_remove(struct octeon_i2c *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) i2c_unregister_device(i2c->ara);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int thunder_i2c_probe_pci(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct octeon_i2c *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (!i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) i2c->roff.sw_twsi = 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) i2c->roff.twsi_int = 0x1010;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) i2c->roff.sw_twsi_ext = 0x1018;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) i2c->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) pci_set_drvdata(pdev, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ret = pcim_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ret = pci_request_regions(pdev, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) i2c->twsi_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (!i2c->twsi_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) thunder_i2c_clock_enable(dev, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ret = device_property_read_u32(dev, "clock-frequency", &i2c->twsi_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) i2c->twsi_freq = I2C_MAX_STANDARD_MODE_FREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) init_waitqueue_head(&i2c->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) i2c->int_enable = thunder_i2c_int_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) i2c->int_disable = thunder_i2c_int_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) i2c->hlc_int_enable = thunder_i2c_hlc_int_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) i2c->hlc_int_disable = thunder_i2c_hlc_int_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSIX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ret = devm_request_irq(dev, pci_irq_vector(pdev, 0), octeon_i2c_isr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DRV_NAME, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ret = octeon_i2c_init_lowlevel(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) octeon_i2c_set_clock(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) i2c->adap = thunderx_i2c_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) i2c->adap.retries = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) i2c->adap.class = I2C_CLASS_HWMON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) i2c->adap.bus_recovery_info = &octeon_i2c_recovery_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) i2c->adap.dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) i2c->adap.dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) snprintf(i2c->adap.name, sizeof(i2c->adap.name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) "Cavium ThunderX i2c adapter at %s", dev_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) i2c_set_adapdata(&i2c->adap, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ret = i2c_add_adapter(&i2c->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) dev_info(i2c->dev, "Probed. Set system clock to %u\n", i2c->sys_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ret = thunder_i2c_smbus_setup(i2c, pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) dev_info(dev, "SMBUS alert not active on this bus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) thunder_i2c_clock_disable(dev, i2c->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static void thunder_i2c_remove_pci(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct octeon_i2c *i2c = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) thunder_i2c_smbus_remove(i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) thunder_i2c_clock_disable(&pdev->dev, i2c->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) i2c_del_adapter(&i2c->adap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const struct pci_device_id thunder_i2c_pci_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_TWSI) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MODULE_DEVICE_TABLE(pci, thunder_i2c_pci_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static struct pci_driver thunder_i2c_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .id_table = thunder_i2c_pci_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .probe = thunder_i2c_probe_pci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .remove = thunder_i2c_remove_pci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) module_pci_driver(thunder_i2c_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MODULE_AUTHOR("Fred Martin <fmartin@caviumnetworks.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MODULE_DESCRIPTION("I2C-Bus adapter for Cavium ThunderX SOC");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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