^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * drivers/i2c/busses/i2c-tegra-bpmp.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016 NVIDIA Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Shardar Shariff Md <smohammed@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <soc/tegra/bpmp-abi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <soc/tegra/bpmp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Serialized I2C message header size is 6 bytes and includes address, flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * and length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SERIALI2C_HDR_SIZE 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct tegra_bpmp_i2c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct i2c_adapter adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct tegra_bpmp *bpmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Linux flags are translated to BPMP defined I2C flags that are used in BPMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * firmware I2C driver to avoid any issues in future if Linux I2C flags are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int tegra_bpmp_xlate_flags(u16 flags, u16 *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (flags & I2C_M_TEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *out |= SERIALI2C_TEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) flags &= ~I2C_M_TEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (flags & I2C_M_RD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) *out |= SERIALI2C_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) flags &= ~I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (flags & I2C_M_STOP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *out |= SERIALI2C_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) flags &= ~I2C_M_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (flags & I2C_M_NOSTART) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *out |= SERIALI2C_NOSTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) flags &= ~I2C_M_NOSTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (flags & I2C_M_REV_DIR_ADDR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *out |= SERIALI2C_REV_DIR_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) flags &= ~I2C_M_REV_DIR_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (flags & I2C_M_IGNORE_NAK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) *out |= SERIALI2C_IGNORE_NAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) flags &= ~I2C_M_IGNORE_NAK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (flags & I2C_M_NO_RD_ACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) *out |= SERIALI2C_NO_RD_ACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) flags &= ~I2C_M_NO_RD_ACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (flags & I2C_M_RECV_LEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *out |= SERIALI2C_RECV_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) flags &= ~I2C_M_RECV_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * The serialized I2C format is simply the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * [addr little-endian][flags little-endian][len little-endian][data if write]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * [addr little-endian][flags little-endian][len little-endian][data if write]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * The flags are translated from Linux kernel representation to seriali2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * representation. Any undefined flag being set causes an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * The data is there only for writes. Reads have the data transferred in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * other direction, and thus data is not present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * See deserialize_i2c documentation for the data format in the other direction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int tegra_bpmp_serialize_i2c_msg(struct tegra_bpmp_i2c *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct mrq_i2c_request *request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct i2c_msg *msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) char *buf = request->xfer.data_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned int i, j, pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) for (i = 0; i < num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct i2c_msg *msg = &msgs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u16 flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) err = tegra_bpmp_xlate_flags(msg->flags, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) buf[pos++] = msg->addr & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) buf[pos++] = (msg->addr & 0xff00) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) buf[pos++] = flags & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) buf[pos++] = (flags & 0xff00) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) buf[pos++] = msg->len & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) buf[pos++] = (msg->len & 0xff00) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if ((flags & SERIALI2C_RD) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) for (j = 0; j < msg->len; j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) buf[pos++] = msg->buf[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) request->xfer.data_size = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * The data in the BPMP -> CPU direction is composed of sequential blocks for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * those messages that have I2C_M_RD. So, for example, if you have:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * - !I2C_M_RD, len == 5, data == a0 01 02 03 04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * - !I2C_M_RD, len == 1, data == a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * - I2C_M_RD, len == 2, data == [uninitialized buffer 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * - !I2C_M_RD, len == 1, data == a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * - I2C_M_RD, len == 2, data == [uninitialized buffer 2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * ...then the data in the BPMP -> CPU direction would be 4 bytes total, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * would contain 2 bytes that will go to uninitialized buffer 1, and 2 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * that will go to uninitialized buffer 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int tegra_bpmp_i2c_deserialize(struct tegra_bpmp_i2c *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct mrq_i2c_response *response,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct i2c_msg *msgs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) unsigned int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) size_t size = response->xfer.data_size, len = 0, pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) char *buf = response->xfer.data_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) for (i = 0; i < num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (msgs[i].flags & I2C_M_RD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) len += msgs[i].len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (len != size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) for (i = 0; i < num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (msgs[i].flags & I2C_M_RD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) memcpy(msgs[i].buf, buf + pos, msgs[i].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pos += msgs[i].len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int tegra_bpmp_i2c_msg_len_check(struct i2c_msg *msgs, unsigned int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) size_t tx_len = 0, rx_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) for (i = 0; i < num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (!(msgs[i].flags & I2C_M_RD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) tx_len += SERIALI2C_HDR_SIZE + msgs[i].len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (tx_len > TEGRA_I2C_IPC_MAX_IN_BUF_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) for (i = 0; i < num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if ((msgs[i].flags & I2C_M_RD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) rx_len += msgs[i].len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (rx_len > TEGRA_I2C_IPC_MAX_OUT_BUF_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int tegra_bpmp_i2c_msg_xfer(struct tegra_bpmp_i2c *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct mrq_i2c_request *request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct mrq_i2c_response *response,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) bool atomic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct tegra_bpmp_message msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) request->cmd = CMD_I2C_XFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) request->xfer.bus_id = i2c->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) memset(&msg, 0, sizeof(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) msg.mrq = MRQ_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) msg.tx.data = request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) msg.tx.size = sizeof(*request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) msg.rx.data = response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) msg.rx.size = sizeof(*response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (atomic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) err = tegra_bpmp_transfer_atomic(i2c->bpmp, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) err = tegra_bpmp_transfer(i2c->bpmp, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int tegra_bpmp_i2c_xfer_common(struct i2c_adapter *adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct i2c_msg *msgs, int num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) bool atomic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct tegra_bpmp_i2c *i2c = i2c_get_adapdata(adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct mrq_i2c_response response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct mrq_i2c_request request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) err = tegra_bpmp_i2c_msg_len_check(msgs, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) dev_err(i2c->dev, "unsupported message length\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) memset(&request, 0, sizeof(request));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) memset(&response, 0, sizeof(response));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) err = tegra_bpmp_serialize_i2c_msg(i2c, &request, msgs, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) dev_err(i2c->dev, "failed to serialize message: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) err = tegra_bpmp_i2c_msg_xfer(i2c, &request, &response, atomic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) dev_err(i2c->dev, "failed to transfer message: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) err = tegra_bpmp_i2c_deserialize(i2c, &response, msgs, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) dev_err(i2c->dev, "failed to deserialize message: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int tegra_bpmp_i2c_xfer(struct i2c_adapter *adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct i2c_msg *msgs, int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return tegra_bpmp_i2c_xfer_common(adapter, msgs, num, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int tegra_bpmp_i2c_xfer_atomic(struct i2c_adapter *adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct i2c_msg *msgs, int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return tegra_bpmp_i2c_xfer_common(adapter, msgs, num, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static u32 tegra_bpmp_i2c_func(struct i2c_adapter *adapter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) I2C_FUNC_PROTOCOL_MANGLING | I2C_FUNC_NOSTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static const struct i2c_algorithm tegra_bpmp_i2c_algo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .master_xfer = tegra_bpmp_i2c_xfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .master_xfer_atomic = tegra_bpmp_i2c_xfer_atomic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .functionality = tegra_bpmp_i2c_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int tegra_bpmp_i2c_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct tegra_bpmp_i2c *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (!i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) i2c->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) i2c->bpmp = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (!i2c->bpmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) err = of_property_read_u32(pdev->dev.of_node, "nvidia,bpmp-bus-id",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) &value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) i2c->bus = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) i2c_set_adapdata(&i2c->adapter, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) i2c->adapter.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) strlcpy(i2c->adapter.name, "Tegra BPMP I2C adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) sizeof(i2c->adapter.name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) i2c->adapter.algo = &tegra_bpmp_i2c_algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) i2c->adapter.dev.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) i2c->adapter.dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) platform_set_drvdata(pdev, i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return i2c_add_adapter(&i2c->adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int tegra_bpmp_i2c_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct tegra_bpmp_i2c *i2c = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) i2c_del_adapter(&i2c->adapter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static const struct of_device_id tegra_bpmp_i2c_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) { .compatible = "nvidia,tegra186-bpmp-i2c", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MODULE_DEVICE_TABLE(of, tegra_bpmp_i2c_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static struct platform_driver tegra_bpmp_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .name = "tegra-bpmp-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .of_match_table = tegra_bpmp_i2c_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .probe = tegra_bpmp_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .remove = tegra_bpmp_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) module_platform_driver(tegra_bpmp_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) MODULE_DESCRIPTION("NVIDIA Tegra BPMP I2C bus controller driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MODULE_AUTHOR("Shardar Shariff Md <smohammed@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) MODULE_AUTHOR("Juha-Matti Tilli");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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