Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * i2c-stm32.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) M'boumba Cedric Madianga 2017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) STMicroelectronics 2017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Author: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _I2C_STM32_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _I2C_STM32_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/dma-direction.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/dmaengine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) enum stm32_i2c_speed {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	STM32_I2C_SPEED_STANDARD, /* 100 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	STM32_I2C_SPEED_FAST, /* 400 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	STM32_I2C_SPEED_FAST_PLUS, /* 1 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	STM32_I2C_SPEED_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * struct stm32_i2c_dma - DMA specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * @chan_tx: dma channel for TX transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * @chan_rx: dma channel for RX transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * @chan_using: dma channel used for the current transfer (TX or RX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * @dma_buf: dma buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * @dma_len: dma buffer len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  * @dma_transfer_dir: dma transfer direction indicator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  * @dma_data_dir: dma transfer mode indicator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * @dma_complete: dma transfer completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct stm32_i2c_dma {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct dma_chan *chan_tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	struct dma_chan *chan_rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	struct dma_chan *chan_using;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	dma_addr_t dma_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	unsigned int dma_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	enum dma_transfer_direction dma_transfer_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	enum dma_data_direction dma_data_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	struct completion dma_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct stm32_i2c_dma *stm32_i2c_dma_request(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 					    dma_addr_t phy_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 					    u32 txdr_offset, u32 rxdr_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) void stm32_i2c_dma_free(struct stm32_i2c_dma *dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int stm32_i2c_prep_dma_xfer(struct device *dev, struct stm32_i2c_dma *dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 			    bool rd_wr, u32 len, u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 			    dma_async_tx_callback callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 			    void *dma_async_param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif /* _I2C_STM32_H */